[gcc r16-2364] RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil

[Pan Li via Gcc-cvs]

https://gcc.gnu.org/g:c655047d3dbd4db295ea9385ac2e337cba0b5e05

commit r16-2364-gc655047d3dbd4db295ea9385ac2e337cba0b5e05
Author: Pan Li <pan2...@intel.com>
Date:   Sat Jul 19 17:17:11 2025 +0800

    RISC-V: Add ashiftrt operand 2 for vector avg_floor and avg_ceil
    
    According to the semantics of the avg_floor and avg_ceil as below:
    
    floor: op0 = (narrow) (((wide) op1 + (wide) op2) >> 1);
    ceil:  op0 = (narrow) (((wide) op1 + (wide) op2 + 1) >> 1);
    
    Aka we have (const_int 1) as the op2 of the ashiftrt but seems missed.
    Thus, add it back to align the definition.
    
    The below test suites are passed for this patch.
    * The rv64gcv fully regression test.
    
    gcc/ChangeLog:
    
            * config/riscv/autovec.md: Add (const_int 1) as the op2 of
            ashiftrt.
    
    Signed-off-by: Pan Li <pan2...@intel.com>

Diff:
---
 gcc/config/riscv/autovec.md | 6 ++++--
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/gcc/config/riscv/autovec.md b/gcc/config/riscv/autovec.md
index da5d0e34d0ab..1fff8ac2fc46 100644
--- a/gcc/config/riscv/autovec.md
+++ b/gcc/config/riscv/autovec.md
@@ -2489,7 +2489,8 @@
       (sign_extend:VWEXTI
        (match_operand:<V_DOUBLE_TRUNC> 1 "register_operand"))
       (sign_extend:VWEXTI
-       (match_operand:<V_DOUBLE_TRUNC> 2 "register_operand"))))))]
+       (match_operand:<V_DOUBLE_TRUNC> 2 "register_operand")))
+     (const_int 1))))]
   "TARGET_VECTOR"
   {
     insn_code icode = code_for_pred (UNSPEC_VAADD, <V_DOUBLE_TRUNC>mode);
@@ -2522,7 +2523,8 @@
        (match_operand:<V_DOUBLE_TRUNC> 1 "register_operand"))
        (sign_extend:VWEXTI
        (match_operand:<V_DOUBLE_TRUNC> 2 "register_operand")))
-      (const_int 1)))))]
+      (const_int 1))
+     (const_int 1))))]
   "TARGET_VECTOR"
   {
     insn_code icode = code_for_pred (UNSPEC_VAADD, <V_DOUBLE_TRUNC>mode);