https://gcc.gnu.org/g:585b849e5af5793b904c5cc9daf3af0cf60d375b
commit 585b849e5af5793b904c5cc9daf3af0cf60d375b
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Mon Sep 8 20:34:47 2025 -0400
Convert between _Float16 and 128-bit binary floating point.
2025-09-08 Michael Meissner <meiss...@linux.ibm.com>
gcc/
* config/rs6000/vsx.md (extendhf<mode>2, FLOAT128 iterator): New
insn.
(trunc<mode>hf2, FLOAT128 iterator): Likewise.
Diff:
---
gcc/config/rs6000/vsx.md | 42 +++++++++++++++++++++++++++++++++++++++++-
1 file changed, 41 insertions(+), 1 deletion(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index 218351447349..3e429bdb1765 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -3156,7 +3156,7 @@
[(set_attr "type" "vecdouble")])
-;; Convert IEEE 16-bit floating point to/from SF and DF modes.
+;; Convert IEEE 16-bit floating point to/from binary floating point modes.
(define_insn "extendhf<mode>2"
[(set (match_operand:SFDF 0 "vsx_register_operand" "=wa")
@@ -3166,6 +3166,26 @@
"xscvhpdp %x0,%x1"
[(set_attr "type" "fpsimple")])
+(define_insn_and_split "extendhf<mode>2"
+ [(set (match_operand:FLOAT128 0 "vsx_register_operand" "=wa")
+ (float_extend:FLOAT128
+ (match_operand:HF 1 "vsx_register_operand" "wa")))
+ (clobber (match_scratch:DF 2 "=wa"))]
+ "TARGET_IEEE16
+ && (FLOAT128_IBM_P (<MODE>mode) || FLOAT128_IEEE_P (<MODE>mode))"
+ "#"
+ "&& 1"
+ [(set (match_dup 2)
+ (float_extend:DF (match_dup 1)))
+ (set (match_dup 0)
+ (float_extend:FLOAT128 (match_dup 2)))]
+{
+ if (GET_CODE (operands[2]) == SCRATCH)
+ operands[2] = gen_reg_rtx (DFmode);
+}
+ [(set_attr "type" "fpsimple")
+ (set_attr "length" "8")])
+
(define_insn "trunc<mode>hf2"
[(set (match_operand:HF 0 "vsx_register_operand" "=wa")
(float_truncate:HF
@@ -3174,6 +3194,26 @@
"xscvdphp %x0,%1"
[(set_attr "type" "fpsimple")])
+(define_insn_and_split "trunc<mode>hf2"
+ [(set (match_operand:HF 0 "vsx_register_operand" "=wa")
+ (float_truncate:HF
+ (match_operand:FLOAT128 1 "vsx_register_operand" "wa")))
+ (clobber (match_scratch:DF 2 "=wa"))]
+ "TARGET_IEEE16
+ && (FLOAT128_IBM_P (<MODE>mode) || FLOAT128_IEEE_P (<MODE>mode))"
+ "#"
+ "&& 1"
+ [(set (match_dup 2)
+ (float_truncate:DF (match_dup 1)))
+ (set (match_dup 0)
+ (float_truncate:HF (match_dup 2)))]
+{
+ if (GET_CODE (operands[2]) == SCRATCH)
+ operands[2] = gen_reg_rtx (DFmode);
+}
+ [(set_attr "type" "fpsimple")
+ (set_attr "length" "8")])
+
;; Permute operations
