https://gcc.gnu.org/g:8e21a7994c88f8592a4c1fdfa1a3218f5185d8a1
commit 8e21a7994c88f8592a4c1fdfa1a3218f5185d8a1
Author: Michael Meissner <meiss...@linux.ibm.com>
Date: Tue Sep 9 18:02:43 2025 -0400
Update ChangeLog.*
Diff:
---
gcc/ChangeLog.float | 44 ++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
diff --git a/gcc/ChangeLog.float b/gcc/ChangeLog.float
index fb699e8452c9..e00ce89f6cda 100644
--- a/gcc/ChangeLog.float
+++ b/gcc/ChangeLog.float
@@ -1,3 +1,47 @@
+==================== Branch work221-float, patch #306 ====================
+
+Remove bfloat16 for now.
+
+2025-09-09 Michael Meissner <meiss...@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/altivec.md (VM): Remove bfloat16 support.
+ (VM2): Likewise.
+ (VI_char): Likewise.
+ (VI_scalar): Likewise.
+ (VI_unit): Likewise.
+ (VU_char): Likewise.
+ * config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Likewise.
+ * config/rs6000/rs6000-modes.def (BFmode): Likewise.
+ * config/rs6000/rs6000.cc (rs6000_debug_reg_global): Likewise.
+ (rs6000_setup_reg_addr_masks): Likewise.
+ (rs6000_init_hard_regno_mode_ok): Likewise.
+ * config/rs6000/rs6000.h (FP16_SCALAR_P): Likewise.
+ * config/rs6000/rs6000.md (FMOVE128_GPR): Likewise.
+ (RELOAD): Likewise.
+ (extendbf<mode>2): Likewise.
+ (trunc<mode>bf2): Likewise.
+ * config/rs6000/vector.md (VEC_L): Likewise.
+ (VEC_M): Likewise.
+ (VEC_E): Likewise.
+ (VEC_base): Likewise.
+ (VEC_base_l): Likewise.
+ (V8HI_V8HF): Likewise.
+ (VSX_L): Likewise.
+ (VSX_M): Likewise.
+ (VSX_XXBR): Likewise.
+ (VSm): Likewise.
+ (VSr): Likewise.
+ (VSisa): Likewise.
+ (??r): Likewise.
+ (nW): Likewise.
+ (VSv): Likewise.
+ (VM3): Likewise.
+ (VM3_char): Likewise.
+ (vsx_extract_<mode>_store_p9): Likewise.
+ (vsx_extract_<mode>_p8): Likewise.
+
==================== Branch work221-float, patch #305 ====================
Attempt to fix bfloat16 problems.
