https://gcc.gnu.org/g:f70de710bb95f56dd02ed623e9a93424eaa34b3f

commit f70de710bb95f56dd02ed623e9a93424eaa34b3f
Author: Michael Meissner <[email protected]>
Date:   Sun Sep 21 02:45:27 2025 -0400

    Remove internal -mpower11 support.
    
    2025-09-21  Michael Meissner  <[email protected]>
    
    gcc/
    
            * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Move 
power11
            support to use CPU options.
            * config/rs6000/rs6000-cpus.def (POWER11_MASKS_SERVER): Likewise.
            (POWERPC_MASKS): Likewise.
            * config/rs6000/rs6000.cc (rs6000_machine_from_flags): Likewise.
            (rs6000_opt_masks): Likewise.
            * config/rs6000/rs6000.h (TARGET_POWER11): New macro.
            * config/rs6000/rs6000.opt (-mpower11): Drop power11 from being an 
ISA
            option.

Diff:
---
 gcc/config/rs6000/rs6000-c.cc     | 2 +-
 gcc/config/rs6000/rs6000-cpus.def | 4 +---
 gcc/config/rs6000/rs6000.cc       | 3 +--
 gcc/config/rs6000/rs6000.h        | 2 ++
 gcc/config/rs6000/rs6000.opt      | 5 +----
 5 files changed, 6 insertions(+), 10 deletions(-)

diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 0261f672ef21..2e6713dee5d6 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -438,7 +438,7 @@ rs6000_target_modify_macros (bool define_p,
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR9");
   if ((flags & OPTION_MASK_POWER10) != 0)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR10");
-  if ((flags & OPTION_MASK_POWER11) != 0)
+  if ((cpu_option & CPU_OPTION_POWER11_MASK) != 0)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_PWR11");
   if ((cpu_option & CPU_OPTION_FUTURE_MASK) != 0)
     rs6000_define_or_undefine_macro (define_p, "_ARCH_FUTURE");
diff --git a/gcc/config/rs6000/rs6000-cpus.def 
b/gcc/config/rs6000/rs6000-cpus.def
index 0d88f12520c8..fc133ed11851 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -122,8 +122,7 @@
                                 | OPTION_MASK_POWER10                  \
                                 | OTHER_POWER10_MASKS)
 
-#define POWER11_MASKS_SERVER (ISA_3_1_MASKS_SERVER                     \
-                             | OPTION_MASK_POWER11)
+#define POWER11_MASKS_SERVER   ISA_3_1_MASKS_SERVER
 
 /* At the moment, do not define any addition -m<xxx> arguments for -mcpu=future
    support.  */
@@ -166,7 +165,6 @@
                                 | OPTION_MASK_FLOAT128_KEYWORD         \
                                 | OPTION_MASK_FPRND                    \
                                 | OPTION_MASK_POWER10                  \
-                                | OPTION_MASK_POWER11                  \
                                 | OPTION_MASK_P10_FUSION               \
                                 | OPTION_MASK_HTM                      \
                                 | OPTION_MASK_ISEL                     \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 296aa8bc1f3e..1d4f87161e16 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -5931,7 +5931,7 @@ rs6000_machine_from_flags (void)
 
   if ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0)
     return "future";
-  if ((flags & (POWER11_MASKS_SERVER & ~ISA_3_1_MASKS_SERVER)) != 0)
+  if ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
     return "power11";
   if ((flags & (ISA_3_1_MASKS_SERVER & ~ISA_3_0_MASKS_SERVER)) != 0)
     return "power10";
@@ -24482,7 +24482,6 @@ static struct rs6000_opt_mask const rs6000_opt_masks[] =
   { "float128-hardware",       OPTION_MASK_FLOAT128_HW,        false, true  },
   { "fprnd",                   OPTION_MASK_FPRND,              false, true  },
   { "power10",                 OPTION_MASK_POWER10,            false, true  },
-  { "power11",                 OPTION_MASK_POWER11,            false, false },
   { "hard-dfp",                        OPTION_MASK_DFP,                false, 
true  },
   { "htm",                     OPTION_MASK_HTM,                false, true  },
   { "isel",                    OPTION_MASK_ISEL,               false, true  },
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index bcee3e025822..78c674b1e05d 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -558,6 +558,8 @@ extern int rs6000_vector_align[];
 
 /* ISA bits that are set via -mcpu=<xxx>, but that do not have an associated
    switch with the option.  */
+#define TARGET_POWER11                                                 \
+  ((rs6000_cpu_option_flags & CPU_OPTION_POWER11_MASK) != 0)
 #define TARGET_FUTURE                                                  \
   ((rs6000_cpu_option_flags & CPU_OPTION_FUTURE_MASK) != 0)
 
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 7c9602e68211..fb323beff9b4 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -598,11 +598,8 @@ Target Undocumented Var(rs6000_speculate_indirect_jumps) 
Init(1) Save
 mpower10
 Target Undocumented Mask(POWER10) Var(rs6000_isa_flags) WarnRemoved
 
-;; Users should not use -mpower11, but we need to use a bit to identify when
-;; the user changes the default cpu via  #pragma GCC target("cpu=power11")
-;; and then resets it later.
 mpower11
-Target Undocumented Mask(POWER11) Var(rs6000_isa_flags) WarnRemoved
+Target Undocumented WarnRemoved
 
 mprefixed
 Target Mask(PREFIXED) Var(rs6000_isa_flags)

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