https://gcc.gnu.org/g:8578937760daf11c76f4ec6a9d2d22854f69e0c4
commit 8578937760daf11c76f4ec6a9d2d22854f69e0c4 Author: Shreya Munnangi <[email protected]> Date: Thu Jul 3 21:03:03 2025 -0600 [RISC-V] Add basic instrumentation to fusion detection We were looking to evaluate some changes from Artemiy that improve GCC's ability to discover fusible instruction pairs. There was no good way to get any static data out of the compiler about what kinds of fusions were happening. Yea, you could grub around the .sched dumps looking for the magic '+' annotation, then look around at the slim RTL representation and make an educated guess about what fused. But boy that was inconvenient. All we really needed was a quick note in the dump file that the target hook found a fusion pair and what kind was discovered. That made it easy to spot invalid fusions, evaluate the effectiveness of Artemiy's work, write/discover testcases for existing fusions and implement new fusions. So from a codegen standpoint this is NFC, it only affects dump file output. It's gone through the usual testing and I'll wait for pre-commit CI to churn through it before moving forward. gcc/ * config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Add basic instrumentation to all cases where fusion is detected. Fix minor formatting goofs found in the process. (cherry picked from commit 053a678cc59a0c8adbdbb78802ff33a619b57b41) Diff: --- gcc/config/riscv/riscv.cc | 80 +++++++++++++++++++++++++++++++++++++---------- 1 file changed, 64 insertions(+), 16 deletions(-) diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc index b60d82eccd4d..e416402699e0 100644 --- a/gcc/config/riscv/riscv.cc +++ b/gcc/config/riscv/riscv.cc @@ -10254,11 +10254,15 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && CONST_INT_P (XEXP (SET_SRC (prev_set), 1)) && CONST_INT_P (XEXP (SET_SRC (curr_set), 1)) && INTVAL (XEXP (SET_SRC (prev_set), 1)) == 32 - && (( INTVAL (XEXP (SET_SRC (curr_set), 1)) == 32 - && riscv_fusion_enabled_p(RISCV_FUSE_ZEXTW) ) - || ( INTVAL (XEXP (SET_SRC (curr_set), 1)) < 32 - && riscv_fusion_enabled_p(RISCV_FUSE_ZEXTWS)))) - return true; + && ((INTVAL (XEXP (SET_SRC (curr_set), 1)) == 32 + && riscv_fusion_enabled_p (RISCV_FUSE_ZEXTW) ) + || (INTVAL (XEXP (SET_SRC (curr_set), 1)) < 32 + && riscv_fusion_enabled_p (RISCV_FUSE_ZEXTWS)))) + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_ZEXTWS\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_ZEXTH) @@ -10279,7 +10283,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && CONST_INT_P (XEXP (SET_SRC (curr_set), 1)) && INTVAL (XEXP (SET_SRC (prev_set), 1)) == 48 && INTVAL (XEXP (SET_SRC (curr_set), 1)) == 48) - return true; + { + if (dump_file) + fprintf (dump_file,"RISCV_FUSE_ZEXTH\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LDINDEXED) @@ -10298,7 +10306,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && GET_CODE (SET_SRC (prev_set)) == PLUS && REG_P (XEXP (SET_SRC (prev_set), 0)) && REG_P (XEXP (SET_SRC (prev_set), 1))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LDINDEXED\n"); + return true; + } /* We are trying to match the following: prev (add) == (set (reg:DI rD) @@ -10314,7 +10326,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && GET_CODE (SET_SRC (prev_set)) == PLUS && REG_P (XEXP (SET_SRC (prev_set), 0)) && REG_P (XEXP (SET_SRC (prev_set), 1))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LDINDEXED\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LDPREINCREMENT) @@ -10333,7 +10349,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && GET_CODE (SET_SRC (prev_set)) == PLUS && REG_P (XEXP (SET_SRC (prev_set), 0)) && CONST_INT_P (XEXP (SET_SRC (prev_set), 1))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LDPREINCREMENT\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LUI_ADDI) @@ -10351,7 +10371,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && (GET_CODE (SET_SRC (prev_set)) == HIGH || (CONST_INT_P (SET_SRC (prev_set)) && LUI_OPERAND (INTVAL (SET_SRC (prev_set)))))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LUI_ADDI\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_AUIPC_ADDI) @@ -10373,7 +10397,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && CONST_INT_P (XEXP (SET_SRC (curr_set), 1)) && SMALL_OPERAND (INTVAL (XEXP (SET_SRC (curr_set), 1)))))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_AUIPC_ADDI\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_LUI_LD) @@ -10393,14 +10421,22 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set))) && GET_CODE (XEXP (SET_SRC (curr_set), 0)) == PLUS && REGNO (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == prev_dest_regno) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LUI_LD\n"); + return true; + } if (GET_CODE (SET_SRC (prev_set)) == HIGH && MEM_P (SET_SRC (curr_set)) && SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set))) && GET_CODE (XEXP (SET_SRC (curr_set), 0)) == LO_SUM && REGNO (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == prev_dest_regno) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LUI_LD\n"); + return true; + } if (GET_CODE (SET_SRC (prev_set)) == HIGH && (GET_CODE (SET_SRC (curr_set)) == SIGN_EXTEND @@ -10410,7 +10446,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && (GET_CODE (XEXP (XEXP (SET_SRC (curr_set), 0), 0)) == LO_SUM && (REGNO (XEXP (XEXP (XEXP (SET_SRC (curr_set), 0), 0), 0)) == prev_dest_regno))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_LUI_LD\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_AUIPC_LD) @@ -10426,7 +10466,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) && MEM_P (SET_SRC (curr_set)) && SCALAR_INT_MODE_P (GET_MODE (SET_DEST (curr_set))) && GET_CODE (XEXP (SET_SRC (curr_set), 0)) == PLUS) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_AUIPC_LD\n"); + return true; + } } if (simple_sets_p && riscv_fusion_enabled_p (RISCV_FUSE_ALIGNED_STD)) @@ -10474,7 +10518,11 @@ riscv_macro_fusion_pair_p (rtx_insn *prev, rtx_insn *curr) lower offset. */ if ((INTVAL (offset_prev) % 16) == 0 && (INTVAL (offset_prev) + 8 == INTVAL (offset_curr))) - return true; + { + if (dump_file) + fprintf (dump_file, "RISCV_FUSE_ALIGNED_STD\n"); + return true; + } } } }
