https://gcc.gnu.org/g:663496cb885919ef74fe8b7077c49d748bbe5c49
commit 663496cb885919ef74fe8b7077c49d748bbe5c49 Author: Michael Meissner <[email protected]> Date: Mon Oct 13 18:29:27 2025 -0400 Spacing changes. 2025-10-13 Michael Meissner <[email protected]> gcc/ * config/rs6000/float16.md (bfloat16_binary_op_internal1): Spacing. (bfloat16_binary_op_internal2): Likewise. (bfloat16_fma_op_internal1): Likewise. (bfloat16_fma_op_internal2): Likewise. (bfloat16_fms_op_internal1): Likewise. (bfloat16_fms_op_internal2): Likewise. (bfloat16_nfma_op_internal1): Likewise. (bfloat16_nfma_op_internal2): Likewise. (bfloat16_nfma_op_internal3): Likewise. (bfloat16_nfms_op_internal1): Likewise. (bfloat16_nfms_op_internal2): Likewise. (bfloat16_nfms_op_internal3): Likewise. Diff: --- gcc/config/rs6000/float16.md | 96 +++++++++++--------------------------------- 1 file changed, 24 insertions(+), 72 deletions(-) diff --git a/gcc/config/rs6000/float16.md b/gcc/config/rs6000/float16.md index bcfa475ac043..28586654f96e 100644 --- a/gcc/config/rs6000/float16.md +++ b/gcc/config/rs6000/float16.md @@ -456,12 +456,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (GET_CODE (operands[1]), - operands[0], - operands[2], - operands[3], - NULL_RTX, - BF16_BINARY); + bfloat16_operation_as_v4sf (GET_CODE (operands[1]), operands[0], operands[2], + operands[3], NULL_RTX, BF16_BINARY); DONE; }) @@ -478,12 +474,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (GET_CODE (operands[1]), - operands[0], - operands[2], - operands[3], - NULL_RTX, - BF16_BINARY); + bfloat16_operation_as_v4sf (GET_CODE (operands[1]), operands[0], operands[2], + operands[3], NULL_RTX, BF16_BINARY); DONE; }) @@ -501,12 +493,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_FMA); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_FMA); DONE; }) @@ -525,12 +513,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_FMA); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_FMA); DONE; }) @@ -549,12 +533,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_FMS); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_FMS); DONE; }) @@ -574,12 +554,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_FMS); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_FMS); DONE; }) @@ -598,12 +574,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_NFMA); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_NFMA); DONE; }) @@ -623,12 +595,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_NFMA); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_NFMA); DONE; }) @@ -648,12 +616,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_NFMA); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_NFMA); DONE; }) @@ -673,12 +637,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_NFMS); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_NFMS); DONE; }) @@ -699,12 +659,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_NFMS); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_NFMS); DONE; }) @@ -725,12 +681,8 @@ "&& 1" [(pc)] { - bfloat16_operation_as_v4sf (FMA, - operands[0], - operands[1], - operands[2], - operands[3], - BF16_NFMS); + bfloat16_operation_as_v4sf (FMA, operands[0], operands[1], operands[2], + operands[3], BF16_NFMS); DONE; })
