https://gcc.gnu.org/g:08a4b75a5d73cf5dcdaf24b8374bbeaadb2e3887
commit r14-12143-g08a4b75a5d73cf5dcdaf24b8374bbeaadb2e3887 Author: Christophe Lyon <[email protected]> Date: Thu Oct 9 14:09:26 2025 +0000 arm: [MVE] Fix operands order in vbicq_f [PR122223] The operands of the floating-point version of vbicq were swapped, this patch fixes this. For this backport the testcase needs an adjustment: the code is less optimized than with gcc-15, so we still generate the 0.0f constant and a vbic instruction. We actually check that the 0.0f constant is in the right vbic parameter. gcc/ChangeLog: PR target/122223 * config/arm/mve.md (@mve_vbicq_f<mode>): Fix operands order. gcc/testsuite/ChangeLog: PR target/122223 * gcc.target/arm/mve/intrinsics/pr122223.c: New test. (cherry picked from commits 81e226440381cc3e033df7e58cc7793c9b4b4e25 and a52888dc71924afb6cd187b0e5f18d2be4c68a07) Diff: --- gcc/config/arm/mve.md | 4 +-- .../gcc.target/arm/mve/intrinsics/pr122223.c | 31 ++++++++++++++++++++++ 2 files changed, 33 insertions(+), 2 deletions(-) diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index f45c555ef063..b5bd6ad6a6d5 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -1267,8 +1267,8 @@ (define_insn "mve_vbicq_f<mode>" [ (set (match_operand:MVE_0 0 "s_register_operand" "=w") - (and:MVE_0 (not:MVE_0 (match_operand:MVE_0 1 "s_register_operand" "w")) - (match_operand:MVE_0 2 "s_register_operand" "w"))) + (and:MVE_0 (not:MVE_0 (match_operand:MVE_0 2 "s_register_operand" "w")) + (match_operand:MVE_0 1 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE && TARGET_HAVE_MVE_FLOAT" "vbic\t%q0, %q1, %q2" diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr122223.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr122223.c new file mode 100644 index 000000000000..05caed19ac01 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/pr122223.c @@ -0,0 +1,31 @@ +/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ +/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ + +/* PR target/122223. */ + +#include <arm_mve.h> + +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmov.f32 (q[0-9]+), #0.0 @ v4sf +** ... +** vbic q[0-9]+, q[0-9]+, \1 +** ... +*/ +float32x4_t foo() { + float32x4_t a = vdupq_n_f32(1.0f); /* 0x3f800000 */ + float32x4_t b = vbicq_f32(a, a); /* 0x3f800000 & ~0x3f800000 => 0x00000000 */ + float32x4_t c = vbicq_f32(a, b); /* 0x3f800000 & ~0x00000000 => 0x3f800000 */ + return c; +} + +#ifdef __cplusplus +} +#endif
