https://gcc.gnu.org/g:690c6055daa818629426d0f4dc6debd96ef20a36
commit r17-970-g690c6055daa818629426d0f4dc6debd96ef20a36 Author: Artemiy Volkov <[email protected]> Date: Fri Jan 9 17:48:19 2026 +0000 aarch64: add zeroing forms for predicated SVE integer unary operations SVE2.2 (or in streaming mode, SME2.2) adds support for zeroing predication for the following integer unary instructions: SVE: - ABS (Absolute value (predicated)) - CLS (Count leading sign bits (predicated)) - CLZ (Count leading zero bits (predicated)) - CNT (Count non-zero bits (predicated)) - CNOT (Logically invert boolean condition (predicated)) - NEG (Negate (predicated)) - NOT (Bitwise invert (predicated)) - RBIT (Reverse bits (predicated)) SVE2: - SQABS (Signed saturating absolute value) - SQNEG (Signed saturating negate) - URECPE (Unsigned reciprocal estimate (predicated)) - URSRQTE (Unsigned reciprocal square root estimate (predicated)) These instructions are covered by the SVE_INT_UNARY and SVE2_U32_UNARY iterators, except for CNOT, which has a standalone pattern. Therefore, three patterns across aarch64-sve.md and aarch64-sve2.md had to be provided with a new alternative, having Dz (const_vector of all zeroes) as the merge operand. The new alternatives are conditional upon the sve2p2_or_sme2p2 test added earlier, and emit the new zeroing-predication forms of the original instructions. The tests that have been added are based on the original SVE/SVE2 tests for corresponding instructions, but all have a "_z" suffix in their name since they only test codegen for the "_z" variants of the corresponding intrinsics. gcc/ChangeLog: * config/aarch64/aarch64-sve.md (*cond_<optab><mode>_any): New alternative for zeroing predication. Add `arch` attribute to every alternative. (*cond_cnot<mode>_any): Likewise. * config/aarch64/aarch64-sve2.md: (*cond_<sve_int_op><mode>): Likewise. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve2/acle/asm/abs_s16_z.c: New test. * gcc.target/aarch64/sve2/acle/asm/abs_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/abs_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/abs_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cls_s16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cls_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cls_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cls_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/clz_s16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/clz_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/clz_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/clz_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/clz_u16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/clz_u32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/clz_u64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/clz_u8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnot_s16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnot_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnot_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnot_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnot_u16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnot_u32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnot_u64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnot_u8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnt_s16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnt_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnt_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnt_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnt_u16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnt_u32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnt_u64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/cnt_u8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/neg_s16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/neg_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/neg_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/neg_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/not_s16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/not_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/not_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/not_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/not_u16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/not_u32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/not_u64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/not_u8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qabs_s16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qabs_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qabs_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qabs_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qneg_s16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qneg_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qneg_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/qneg_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rbit_s16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rbit_s32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rbit_s64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rbit_s8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rbit_u16_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rbit_u32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rbit_u64_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rbit_u8_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/recpe_u32_z.c: Likewise. * gcc.target/aarch64/sve2/acle/asm/rsqrte_u32_z.c: Likewise. Diff: --- gcc/config/aarch64/aarch64-sve.md | 18 +++++++------ gcc/config/aarch64/aarch64-sve2.md | 9 ++++--- .../gcc.target/aarch64/sve2/acle/asm/abs_s16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/abs_s32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/abs_s64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/abs_s8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cls_s16_z.c | 20 +++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cls_s32_z.c | 20 +++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cls_s64_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cls_s8_z.c | 20 +++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/clz_s16_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/clz_s32_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/clz_s64_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/clz_s8_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/clz_u16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/clz_u32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/clz_u64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/clz_u8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnot_s16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnot_s32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnot_s64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnot_s8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnot_u16_z.c | 30 ++++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnot_u32_z.c | 30 ++++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnot_u64_z.c | 30 ++++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnot_u8_z.c | 30 ++++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_bf16_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_f16_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_f32_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_f64_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_s16_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_s32_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_s64_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_s8_z.c | 19 ++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_u16_z.c | 30 ++++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_u32_z.c | 30 ++++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_u64_z.c | 30 ++++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/cnt_u8_z.c | 30 ++++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/neg_s16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/neg_s32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/neg_s64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/neg_s8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/not_s16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/not_s32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/not_s64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/not_s8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/not_u16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/not_u32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/not_u64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/not_u8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/qabs_s16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/qabs_s32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/qabs_s64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/qabs_s8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/qneg_s16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/qneg_s32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/qneg_s64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/qneg_s8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/rbit_s16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/rbit_s32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/rbit_s64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/rbit_s8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/rbit_u16_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/rbit_u32_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/rbit_u64_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/rbit_u8_z.c | 29 +++++++++++++++++++++ .../gcc.target/aarch64/sve2/acle/asm/recpe_u32_z.c | 26 +++++++++++++++++++ .../aarch64/sve2/acle/asm/rsqrte_u32_z.c | 28 ++++++++++++++++++++ 68 files changed, 1776 insertions(+), 12 deletions(-) diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md index ba4ff7267914..411988d33d91 100644 --- a/gcc/config/aarch64/aarch64-sve.md +++ b/gcc/config/aarch64/aarch64-sve.md @@ -3468,10 +3468,11 @@ (match_operand:SVE_I 3 "aarch64_simd_reg_or_zero")] UNSPEC_SEL))] "TARGET_SVE && !rtx_equal_p (operands[2], operands[3])" - {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx ] - [ &w , Upl , w , 0 ; * ] <sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> - [ ?&w , Upl , w , Dz ; yes ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> - [ ?&w , Upl , w , w ; yes ] movprfx\t%0, %3\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> + {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx, arch ] + [ &w , Upl , w , 0 ; * , * ] <sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> + [ &w , Upl , w , Dz ; * , sve2p2_or_sme2p2 ] <sve_int_op>\t%0.<Vetype>, %1/z, %2.<Vetype> + [ ?&w , Upl , w , Dz ; yes , * ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> + [ ?&w , Upl , w , w ; yes , * ] movprfx\t%0, %3\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> } [(set_attr "sve_type" "sve_int_general")] ) @@ -3921,10 +3922,11 @@ (match_operand:SVE_I 6 "aarch64_simd_reg_or_zero")] UNSPEC_SEL))] "TARGET_SVE && !rtx_equal_p (operands[2], operands[6])" - {@ [ cons: =0 , 1 , 2 , 6 ; attrs: movprfx ] - [ &w , Upl , w , 0 ; * ] cnot\t%0.<Vetype>, %1/m, %2.<Vetype> - [ ?&w , Upl , w , Dz ; yes ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;cnot\t%0.<Vetype>, %1/m, %2.<Vetype> - [ ?&w , Upl , w , w ; yes ] movprfx\t%0, %6\;cnot\t%0.<Vetype>, %1/m, %2.<Vetype> + {@ [ cons: =0 , 1 , 2 , 6 ; attrs: movprfx, arch ] + [ &w , Upl , w , 0 ; * , * ] cnot\t%0.<Vetype>, %1/m, %2.<Vetype> + [ &w , Upl , w , Dz ; * , sve2p2_or_sme2p2 ] cnot\t%0.<Vetype>, %1/z, %2.<Vetype> + [ ?&w , Upl , w , Dz ; yes , * ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;cnot\t%0.<Vetype>, %1/m, %2.<Vetype> + [ ?&w , Upl , w , w ; yes , * ] movprfx\t%0, %6\;cnot\t%0.<Vetype>, %1/m, %2.<Vetype> } "&& !CONSTANT_P (operands[5])" { diff --git a/gcc/config/aarch64/aarch64-sve2.md b/gcc/config/aarch64/aarch64-sve2.md index 4ceb8c784d93..d7031b522be4 100644 --- a/gcc/config/aarch64/aarch64-sve2.md +++ b/gcc/config/aarch64/aarch64-sve2.md @@ -3853,10 +3853,11 @@ (match_operand:VNx4SI_ONLY 3 "aarch64_simd_reg_or_zero")] UNSPEC_SEL))] "TARGET_SVE2" - {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx ] - [ w , Upl , w , 0 ; * ] <sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> - [ ?&w , Upl , w , Dz ; yes ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> - [ ?&w , Upl , w , w ; yes ] movprfx\t%0, %3\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> + {@ [ cons: =0 , 1 , 2 , 3 ; attrs: movprfx, arch ] + [ w , Upl , w , 0 ; * , * ] <sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> + [ w , Upl , w , Dz ; * , sve2p2_or_sme2p2 ] <sve_int_op>\t%0.<Vetype>, %1/z, %2.<Vetype> + [ ?&w , Upl , w , Dz ; yes , * ] movprfx\t%0.<Vetype>, %1/z, %2.<Vetype>\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> + [ ?&w , Upl , w , w ; yes , * ] movprfx\t%0, %3\;<sve_int_op>\t%0.<Vetype>, %1/m, %2.<Vetype> } "&& !CONSTANT_P (operands[4])" { diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s16_z.c new file mode 100644 index 000000000000..69aa0053585d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** abs_s16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** abs z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (abs_s16_z_tied1, svint16_t, + z0 = svabs_s16_z (p0, z0), + z0 = svabs_z (p0, z0)) + +/* +** abs_s16_z_untied: +** abs z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (abs_s16_z_untied, svint16_t, + z0 = svabs_s16_z (p0, z1), + z0 = svabs_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s32_z.c new file mode 100644 index 000000000000..d304782f3a63 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** abs_s32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** abs z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (abs_s32_z_tied1, svint32_t, + z0 = svabs_s32_z (p0, z0), + z0 = svabs_z (p0, z0)) + +/* +** abs_s32_z_untied: +** abs z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (abs_s32_z_untied, svint32_t, + z0 = svabs_s32_z (p0, z1), + z0 = svabs_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s64_z.c new file mode 100644 index 000000000000..17d3e2415e0c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** abs_s64_z_tied1: +** mov (z[0-9]+\.d), z0\.d +** abs z0\.d, p0/z, \1 +** ret +*/ +TEST_UNIFORM_Z (abs_s64_z_tied1, svint64_t, + z0 = svabs_s64_z (p0, z0), + z0 = svabs_z (p0, z0)) + +/* +** abs_s64_z_untied: +** abs z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (abs_s64_z_untied, svint64_t, + z0 = svabs_s64_z (p0, z1), + z0 = svabs_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s8_z.c new file mode 100644 index 000000000000..6c032e1ac764 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/abs_s8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** abs_s8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** abs z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (abs_s8_z_tied1, svint8_t, + z0 = svabs_s8_z (p0, z0), + z0 = svabs_z (p0, z0)) + +/* +** abs_s8_z_untied: +** abs z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (abs_s8_z_untied, svint8_t, + z0 = svabs_s8_z (p0, z1), + z0 = svabs_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s16_z.c new file mode 100644 index 000000000000..768742bfbcf6 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s16_z.c @@ -0,0 +1,20 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cls_s16_z: +** cls z0\.h, p0/z, z4\.h +** ret +*/ +TEST_DUAL_Z (cls_s16_z, svuint16_t, svint16_t, + z0 = svcls_s16_z (p0, z4), + z0 = svcls_z (p0, z4)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s32_z.c new file mode 100644 index 000000000000..c9b27347636e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s32_z.c @@ -0,0 +1,20 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cls_s32_z: +** cls z0\.s, p0/z, z4\.s +** ret +*/ +TEST_DUAL_Z (cls_s32_z, svuint32_t, svint32_t, + z0 = svcls_s32_z (p0, z4), + z0 = svcls_z (p0, z4)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s64_z.c new file mode 100644 index 000000000000..d6a59a94fe00 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s64_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cls_s64_z: +** cls z0\.d, p0/z, z4\.d +** ret +*/ +TEST_DUAL_Z (cls_s64_z, svuint64_t, svint64_t, + z0 = svcls_s64_z (p0, z4), + z0 = svcls_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s8_z.c new file mode 100644 index 000000000000..b784ddd0bad2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cls_s8_z.c @@ -0,0 +1,20 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cls_s8_z: +** cls z0\.b, p0/z, z4\.b +** ret +*/ +TEST_DUAL_Z (cls_s8_z, svuint8_t, svint8_t, + z0 = svcls_s8_z (p0, z4), + z0 = svcls_z (p0, z4)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s16_z.c new file mode 100644 index 000000000000..84c23fe404dd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s16_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** clz_s16_z: +** clz z0\.h, p0/z, z4\.h +** ret +*/ +TEST_DUAL_Z (clz_s16_z, svuint16_t, svint16_t, + z0 = svclz_s16_z (p0, z4), + z0 = svclz_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s32_z.c new file mode 100644 index 000000000000..ed74432b000e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s32_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** clz_s32_z: +** clz z0\.s, p0/z, z4\.s +** ret +*/ +TEST_DUAL_Z (clz_s32_z, svuint32_t, svint32_t, + z0 = svclz_s32_z (p0, z4), + z0 = svclz_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s64_z.c new file mode 100644 index 000000000000..b899115b3e17 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s64_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** clz_s64_z: +** clz z0\.d, p0/z, z4\.d +** ret +*/ +TEST_DUAL_Z (clz_s64_z, svuint64_t, svint64_t, + z0 = svclz_s64_z (p0, z4), + z0 = svclz_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s8_z.c new file mode 100644 index 000000000000..bd9f118dc4ee --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_s8_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** clz_s8_z: +** clz z0\.b, p0/z, z4\.b +** ret +*/ +TEST_DUAL_Z (clz_s8_z, svuint8_t, svint8_t, + z0 = svclz_s8_z (p0, z4), + z0 = svclz_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u16_z.c new file mode 100644 index 000000000000..60f203bc1cf3 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** clz_u16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** clz z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (clz_u16_z_tied1, svuint16_t, + z0 = svclz_u16_z (p0, z0), + z0 = svclz_z (p0, z0)) + +/* +** clz_u16_z_untied: +** clz z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (clz_u16_z_untied, svuint16_t, + z0 = svclz_u16_z (p0, z1), + z0 = svclz_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u32_z.c new file mode 100644 index 000000000000..2b24e0802ea7 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** clz_u32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** clz z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (clz_u32_z_tied1, svuint32_t, + z0 = svclz_u32_z (p0, z0), + z0 = svclz_z (p0, z0)) + +/* +** clz_u32_z_untied: +** clz z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (clz_u32_z_untied, svuint32_t, + z0 = svclz_u32_z (p0, z1), + z0 = svclz_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u64_z.c new file mode 100644 index 000000000000..0237f0636320 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** clz_u64_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** clz z0\.d, p0/z, \1\.d +** ret +*/ +TEST_UNIFORM_Z (clz_u64_z_tied1, svuint64_t, + z0 = svclz_u64_z (p0, z0), + z0 = svclz_z (p0, z0)) + +/* +** clz_u64_z_untied: +** clz z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (clz_u64_z_untied, svuint64_t, + z0 = svclz_u64_z (p0, z1), + z0 = svclz_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u8_z.c new file mode 100644 index 000000000000..6db9e0cd5474 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/clz_u8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** clz_u8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** clz z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (clz_u8_z_tied1, svuint8_t, + z0 = svclz_u8_z (p0, z0), + z0 = svclz_z (p0, z0)) + +/* +** clz_u8_z_untied: +** clz z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (clz_u8_z_untied, svuint8_t, + z0 = svclz_u8_z (p0, z1), + z0 = svclz_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s16_z.c new file mode 100644 index 000000000000..c07d8053ab2a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnot_s16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnot z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (cnot_s16_z_tied1, svint16_t, + z0 = svcnot_s16_z (p0, z0), + z0 = svcnot_z (p0, z0)) + +/* +** cnot_s16_z_untied: +** cnot z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (cnot_s16_z_untied, svint16_t, + z0 = svcnot_s16_z (p0, z1), + z0 = svcnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s32_z.c new file mode 100644 index 000000000000..23cdb91cf556 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnot_s32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnot z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (cnot_s32_z_tied1, svint32_t, + z0 = svcnot_s32_z (p0, z0), + z0 = svcnot_z (p0, z0)) + +/* +** cnot_s32_z_untied: +** cnot z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (cnot_s32_z_untied, svint32_t, + z0 = svcnot_s32_z (p0, z1), + z0 = svcnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s64_z.c new file mode 100644 index 000000000000..3f71da7c72ad --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnot_s64_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnot z0\.d, p0/z, \1\.d +** ret +*/ +TEST_UNIFORM_Z (cnot_s64_z_tied1, svint64_t, + z0 = svcnot_s64_z (p0, z0), + z0 = svcnot_z (p0, z0)) + +/* +** cnot_s64_z_untied: +** cnot z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (cnot_s64_z_untied, svint64_t, + z0 = svcnot_s64_z (p0, z1), + z0 = svcnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s8_z.c new file mode 100644 index 000000000000..2e975e4f0683 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_s8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnot_s8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnot z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (cnot_s8_z_tied1, svint8_t, + z0 = svcnot_s8_z (p0, z0), + z0 = svcnot_z (p0, z0)) + +/* +** cnot_s8_z_untied: +** cnot z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (cnot_s8_z_untied, svint8_t, + z0 = svcnot_s8_z (p0, z1), + z0 = svcnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u16_z.c new file mode 100644 index 000000000000..3e92ecbebfa1 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u16_z.c @@ -0,0 +1,30 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnot_u16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnot z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (cnot_u16_z_tied1, svuint16_t, + z0 = svcnot_u16_z (p0, z0), + z0 = svcnot_z (p0, z0)) + +/* +** cnot_u16_z_untied: +** cnot z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (cnot_u16_z_untied, svuint16_t, + z0 = svcnot_u16_z (p0, z1), + z0 = svcnot_z (p0, z1)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u32_z.c new file mode 100644 index 000000000000..048db22376da --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u32_z.c @@ -0,0 +1,30 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnot_u32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnot z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (cnot_u32_z_tied1, svuint32_t, + z0 = svcnot_u32_z (p0, z0), + z0 = svcnot_z (p0, z0)) + +/* +** cnot_u32_z_untied: +** cnot z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (cnot_u32_z_untied, svuint32_t, + z0 = svcnot_u32_z (p0, z1), + z0 = svcnot_z (p0, z1)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u64_z.c new file mode 100644 index 000000000000..723551df8f67 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u64_z.c @@ -0,0 +1,30 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnot_u64_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnot z0\.d, p0/z, \1\.d +** ret +*/ +TEST_UNIFORM_Z (cnot_u64_z_tied1, svuint64_t, + z0 = svcnot_u64_z (p0, z0), + z0 = svcnot_z (p0, z0)) + +/* +** cnot_u64_z_untied: +** cnot z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (cnot_u64_z_untied, svuint64_t, + z0 = svcnot_u64_z (p0, z1), + z0 = svcnot_z (p0, z1)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u8_z.c new file mode 100644 index 000000000000..dafa400b45dd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnot_u8_z.c @@ -0,0 +1,30 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnot_u8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnot z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (cnot_u8_z_tied1, svuint8_t, + z0 = svcnot_u8_z (p0, z0), + z0 = svcnot_z (p0, z0)) + +/* +** cnot_u8_z_untied: +** cnot z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (cnot_u8_z_untied, svuint8_t, + z0 = svcnot_u8_z (p0, z1), + z0 = svcnot_z (p0, z1)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_bf16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_bf16_z.c new file mode 100644 index 000000000000..05bbb9680910 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_bf16_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_bf16_z: +** cnt z0\.h, p0/z, z4\.h +** ret +*/ +TEST_DUAL_Z (cnt_bf16_z, svuint16_t, svbfloat16_t, + z0 = svcnt_bf16_z (p0, z4), + z0 = svcnt_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_f16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_f16_z.c new file mode 100644 index 000000000000..60c5cde43a23 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_f16_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_f16_z: +** cnt z0\.h, p0/z, z4\.h +** ret +*/ +TEST_DUAL_Z (cnt_f16_z, svuint16_t, svfloat16_t, + z0 = svcnt_f16_z (p0, z4), + z0 = svcnt_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_f32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_f32_z.c new file mode 100644 index 000000000000..28287d49e906 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_f32_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_f32_z: +** cnt z0\.s, p0/z, z4\.s +** ret +*/ +TEST_DUAL_Z (cnt_f32_z, svuint32_t, svfloat32_t, + z0 = svcnt_f32_z (p0, z4), + z0 = svcnt_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_f64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_f64_z.c new file mode 100644 index 000000000000..f3bf1f976cef --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_f64_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_f64_z: +** cnt z0\.d, p0/z, z4\.d +** ret +*/ +TEST_DUAL_Z (cnt_f64_z, svuint64_t, svfloat64_t, + z0 = svcnt_f64_z (p0, z4), + z0 = svcnt_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s16_z.c new file mode 100644 index 000000000000..e6023b3b4976 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s16_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_s16_z: +** cnt z0\.h, p0/z, z4\.h +** ret +*/ +TEST_DUAL_Z (cnt_s16_z, svuint16_t, svint16_t, + z0 = svcnt_s16_z (p0, z4), + z0 = svcnt_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s32_z.c new file mode 100644 index 000000000000..b598d5b0deb1 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s32_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_s32_z: +** cnt z0\.s, p0/z, z4\.s +** ret +*/ +TEST_DUAL_Z (cnt_s32_z, svuint32_t, svint32_t, + z0 = svcnt_s32_z (p0, z4), + z0 = svcnt_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s64_z.c new file mode 100644 index 000000000000..14942c7742f0 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s64_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_s64_z: +** cnt z0\.d, p0/z, z4\.d +** ret +*/ +TEST_DUAL_Z (cnt_s64_z, svuint64_t, svint64_t, + z0 = svcnt_s64_z (p0, z4), + z0 = svcnt_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s8_z.c new file mode 100644 index 000000000000..4dfed72e771c --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_s8_z.c @@ -0,0 +1,19 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_s8_z: +** cnt z0\.b, p0/z, z4\.b +** ret +*/ +TEST_DUAL_Z (cnt_s8_z, svuint8_t, svint8_t, + z0 = svcnt_s8_z (p0, z4), + z0 = svcnt_z (p0, z4)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u16_z.c new file mode 100644 index 000000000000..0bf9834b8287 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u16_z.c @@ -0,0 +1,30 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_u16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnt z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (cnt_u16_z_tied1, svuint16_t, + z0 = svcnt_u16_z (p0, z0), + z0 = svcnt_z (p0, z0)) + +/* +** cnt_u16_z_untied: +** cnt z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (cnt_u16_z_untied, svuint16_t, + z0 = svcnt_u16_z (p0, z1), + z0 = svcnt_z (p0, z1)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u32_z.c new file mode 100644 index 000000000000..55b808df43df --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u32_z.c @@ -0,0 +1,30 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_u32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnt z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (cnt_u32_z_tied1, svuint32_t, + z0 = svcnt_u32_z (p0, z0), + z0 = svcnt_z (p0, z0)) + +/* +** cnt_u32_z_untied: +** cnt z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (cnt_u32_z_untied, svuint32_t, + z0 = svcnt_u32_z (p0, z1), + z0 = svcnt_z (p0, z1)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u64_z.c new file mode 100644 index 000000000000..104f138a8cac --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u64_z.c @@ -0,0 +1,30 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_u64_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnt z0\.d, p0/z, \1\.d +** ret +*/ +TEST_UNIFORM_Z (cnt_u64_z_tied1, svuint64_t, + z0 = svcnt_u64_z (p0, z0), + z0 = svcnt_z (p0, z0)) + +/* +** cnt_u64_z_untied: +** cnt z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (cnt_u64_z_untied, svuint64_t, + z0 = svcnt_u64_z (p0, z1), + z0 = svcnt_z (p0, z1)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u8_z.c new file mode 100644 index 000000000000..729501db8108 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/cnt_u8_z.c @@ -0,0 +1,30 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** cnt_u8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** cnt z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (cnt_u8_z_tied1, svuint8_t, + z0 = svcnt_u8_z (p0, z0), + z0 = svcnt_z (p0, z0)) + +/* +** cnt_u8_z_untied: +** cnt z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (cnt_u8_z_untied, svuint8_t, + z0 = svcnt_u8_z (p0, z1), + z0 = svcnt_z (p0, z1)) + diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s16_z.c new file mode 100644 index 000000000000..1ae3cda3c012 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** neg_s16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** neg z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (neg_s16_z_tied1, svint16_t, + z0 = svneg_s16_z (p0, z0), + z0 = svneg_z (p0, z0)) + +/* +** neg_s16_z_untied: +** neg z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (neg_s16_z_untied, svint16_t, + z0 = svneg_s16_z (p0, z1), + z0 = svneg_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s32_z.c new file mode 100644 index 000000000000..51a6b481206e --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** neg_s32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** neg z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (neg_s32_z_tied1, svint32_t, + z0 = svneg_s32_z (p0, z0), + z0 = svneg_z (p0, z0)) + +/* +** neg_s32_z_untied: +** neg z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (neg_s32_z_untied, svint32_t, + z0 = svneg_s32_z (p0, z1), + z0 = svneg_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s64_z.c new file mode 100644 index 000000000000..a8a2b35d6929 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** neg_s64_z_tied1: +** mov (z[0-9]+\.d), z0\.d +** neg z0\.d, p0/z, \1 +** ret +*/ +TEST_UNIFORM_Z (neg_s64_z_tied1, svint64_t, + z0 = svneg_s64_z (p0, z0), + z0 = svneg_z (p0, z0)) + +/* +** neg_s64_z_untied: +** neg z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (neg_s64_z_untied, svint64_t, + z0 = svneg_s64_z (p0, z1), + z0 = svneg_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s8_z.c new file mode 100644 index 000000000000..0d0bbfa79b79 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/neg_s8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** neg_s8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** neg z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (neg_s8_z_tied1, svint8_t, + z0 = svneg_s8_z (p0, z0), + z0 = svneg_z (p0, z0)) + +/* +** neg_s8_z_untied: +** neg z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (neg_s8_z_untied, svint8_t, + z0 = svneg_s8_z (p0, z1), + z0 = svneg_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s16_z.c new file mode 100644 index 000000000000..60048d3021c5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** not_s16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** not z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (not_s16_z_tied1, svint16_t, + z0 = svnot_s16_z (p0, z0), + z0 = svnot_z (p0, z0)) + +/* +** not_s16_z_untied: +** not z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (not_s16_z_untied, svint16_t, + z0 = svnot_s16_z (p0, z1), + z0 = svnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s32_z.c new file mode 100644 index 000000000000..927459fed6cd --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** not_s32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** not z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (not_s32_z_tied1, svint32_t, + z0 = svnot_s32_z (p0, z0), + z0 = svnot_z (p0, z0)) + +/* +** not_s32_z_untied: +** not z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (not_s32_z_untied, svint32_t, + z0 = svnot_s32_z (p0, z1), + z0 = svnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s64_z.c new file mode 100644 index 000000000000..b005ef349cb2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** not_s64_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** not z0\.d, p0/z, \1\.d +** ret +*/ +TEST_UNIFORM_Z (not_s64_z_tied1, svint64_t, + z0 = svnot_s64_z (p0, z0), + z0 = svnot_z (p0, z0)) + +/* +** not_s64_z_untied: +** not z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (not_s64_z_untied, svint64_t, + z0 = svnot_s64_z (p0, z1), + z0 = svnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s8_z.c new file mode 100644 index 000000000000..bbab73885ec3 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_s8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** not_s8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** not z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (not_s8_z_tied1, svint8_t, + z0 = svnot_s8_z (p0, z0), + z0 = svnot_z (p0, z0)) + +/* +** not_s8_z_untied: +** not z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (not_s8_z_untied, svint8_t, + z0 = svnot_s8_z (p0, z1), + z0 = svnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u16_z.c new file mode 100644 index 000000000000..7b612a892c45 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** not_u16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** not z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (not_u16_z_tied1, svuint16_t, + z0 = svnot_u16_z (p0, z0), + z0 = svnot_z (p0, z0)) + +/* +** not_u16_z_untied: +** not z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (not_u16_z_untied, svuint16_t, + z0 = svnot_u16_z (p0, z1), + z0 = svnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u32_z.c new file mode 100644 index 000000000000..b586f612cd96 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** not_u32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** not z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (not_u32_z_tied1, svuint32_t, + z0 = svnot_u32_z (p0, z0), + z0 = svnot_z (p0, z0)) + +/* +** not_u32_z_untied: +** not z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (not_u32_z_untied, svuint32_t, + z0 = svnot_u32_z (p0, z1), + z0 = svnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u64_z.c new file mode 100644 index 000000000000..ee3cfbf4f6ae --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** not_u64_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** not z0\.d, p0/z, \1\.d +** ret +*/ +TEST_UNIFORM_Z (not_u64_z_tied1, svuint64_t, + z0 = svnot_u64_z (p0, z0), + z0 = svnot_z (p0, z0)) + +/* +** not_u64_z_untied: +** not z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (not_u64_z_untied, svuint64_t, + z0 = svnot_u64_z (p0, z1), + z0 = svnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u8_z.c new file mode 100644 index 000000000000..bb760c6e15f5 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/not_u8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** not_u8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** not z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (not_u8_z_tied1, svuint8_t, + z0 = svnot_u8_z (p0, z0), + z0 = svnot_z (p0, z0)) + +/* +** not_u8_z_untied: +** not z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (not_u8_z_untied, svuint8_t, + z0 = svnot_u8_z (p0, z1), + z0 = svnot_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s16_z.c new file mode 100644 index 000000000000..bacb34b1de8d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** qabs_s16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** sqabs z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (qabs_s16_z_tied1, svint16_t, + z0 = svqabs_s16_z (p0, z0), + z0 = svqabs_z (p0, z0)) + +/* +** qabs_s16_z_untied: +** sqabs z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (qabs_s16_z_untied, svint16_t, + z0 = svqabs_s16_z (p0, z1), + z0 = svqabs_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s32_z.c new file mode 100644 index 000000000000..9b7852e04182 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** qabs_s32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** sqabs z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (qabs_s32_z_tied1, svint32_t, + z0 = svqabs_s32_z (p0, z0), + z0 = svqabs_z (p0, z0)) + +/* +** qabs_s32_z_untied: +** sqabs z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (qabs_s32_z_untied, svint32_t, + z0 = svqabs_s32_z (p0, z1), + z0 = svqabs_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s64_z.c new file mode 100644 index 000000000000..4b899a254e73 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** qabs_s64_z_tied1: +** mov (z[0-9]+\.d), z0\.d +** sqabs z0\.d, p0/z, \1 +** ret +*/ +TEST_UNIFORM_Z (qabs_s64_z_tied1, svint64_t, + z0 = svqabs_s64_z (p0, z0), + z0 = svqabs_z (p0, z0)) + +/* +** qabs_s64_z_untied: +** sqabs z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (qabs_s64_z_untied, svint64_t, + z0 = svqabs_s64_z (p0, z1), + z0 = svqabs_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s8_z.c new file mode 100644 index 000000000000..48b0d0c1aa0a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qabs_s8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** qabs_s8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** sqabs z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (qabs_s8_z_tied1, svint8_t, + z0 = svqabs_s8_z (p0, z0), + z0 = svqabs_z (p0, z0)) + +/* +** qabs_s8_z_untied: +** sqabs z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (qabs_s8_z_untied, svint8_t, + z0 = svqabs_s8_z (p0, z1), + z0 = svqabs_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s16_z.c new file mode 100644 index 000000000000..821080707768 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** qneg_s16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** sqneg z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (qneg_s16_z_tied1, svint16_t, + z0 = svqneg_s16_z (p0, z0), + z0 = svqneg_z (p0, z0)) + +/* +** qneg_s16_z_untied: +** sqneg z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (qneg_s16_z_untied, svint16_t, + z0 = svqneg_s16_z (p0, z1), + z0 = svqneg_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s32_z.c new file mode 100644 index 000000000000..5f488893014f --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** qneg_s32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** sqneg z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (qneg_s32_z_tied1, svint32_t, + z0 = svqneg_s32_z (p0, z0), + z0 = svqneg_z (p0, z0)) + +/* +** qneg_s32_z_untied: +** sqneg z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (qneg_s32_z_untied, svint32_t, + z0 = svqneg_s32_z (p0, z1), + z0 = svqneg_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s64_z.c new file mode 100644 index 000000000000..7c469b0335fb --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** qneg_s64_z_tied1: +** mov (z[0-9]+\.d), z0\.d +** sqneg z0\.d, p0/z, \1 +** ret +*/ +TEST_UNIFORM_Z (qneg_s64_z_tied1, svint64_t, + z0 = svqneg_s64_z (p0, z0), + z0 = svqneg_z (p0, z0)) + +/* +** qneg_s64_z_untied: +** sqneg z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (qneg_s64_z_untied, svint64_t, + z0 = svqneg_s64_z (p0, z1), + z0 = svqneg_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s8_z.c new file mode 100644 index 000000000000..67d43096f295 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/qneg_s8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** qneg_s8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** sqneg z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (qneg_s8_z_tied1, svint8_t, + z0 = svqneg_s8_z (p0, z0), + z0 = svqneg_z (p0, z0)) + +/* +** qneg_s8_z_untied: +** sqneg z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (qneg_s8_z_untied, svint8_t, + z0 = svqneg_s8_z (p0, z1), + z0 = svqneg_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s16_z.c new file mode 100644 index 000000000000..4cb64a878853 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** rbit_s16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** rbit z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (rbit_s16_z_tied1, svint16_t, + z0 = svrbit_s16_z (p0, z0), + z0 = svrbit_z (p0, z0)) + +/* +** rbit_s16_z_untied: +** rbit z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (rbit_s16_z_untied, svint16_t, + z0 = svrbit_s16_z (p0, z1), + z0 = svrbit_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s32_z.c new file mode 100644 index 000000000000..ac00de92754d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** rbit_s32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** rbit z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (rbit_s32_z_tied1, svint32_t, + z0 = svrbit_s32_z (p0, z0), + z0 = svrbit_z (p0, z0)) + +/* +** rbit_s32_z_untied: +** rbit z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (rbit_s32_z_untied, svint32_t, + z0 = svrbit_s32_z (p0, z1), + z0 = svrbit_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s64_z.c new file mode 100644 index 000000000000..63d57fc515c3 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** rbit_s64_z_tied1: +** mov (z[0-9]+\.d), z0\.d +** rbit z0\.d, p0/z, \1 +** ret +*/ +TEST_UNIFORM_Z (rbit_s64_z_tied1, svint64_t, + z0 = svrbit_s64_z (p0, z0), + z0 = svrbit_z (p0, z0)) + +/* +** rbit_s64_z_untied: +** rbit z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (rbit_s64_z_untied, svint64_t, + z0 = svrbit_s64_z (p0, z1), + z0 = svrbit_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s8_z.c new file mode 100644 index 000000000000..6b0486bc7d3b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_s8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** rbit_s8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** rbit z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (rbit_s8_z_tied1, svint8_t, + z0 = svrbit_s8_z (p0, z0), + z0 = svrbit_z (p0, z0)) + +/* +** rbit_s8_z_untied: +** rbit z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (rbit_s8_z_untied, svint8_t, + z0 = svrbit_s8_z (p0, z1), + z0 = svrbit_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u16_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u16_z.c new file mode 100644 index 000000000000..e9ab1151d918 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u16_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** rbit_u16_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** rbit z0\.h, p0/z, \1\.h +** ret +*/ +TEST_UNIFORM_Z (rbit_u16_z_tied1, svuint16_t, + z0 = svrbit_u16_z (p0, z0), + z0 = svrbit_z (p0, z0)) + +/* +** rbit_u16_z_untied: +** rbit z0\.h, p0/z, z1\.h +** ret +*/ +TEST_UNIFORM_Z (rbit_u16_z_untied, svuint16_t, + z0 = svrbit_u16_z (p0, z1), + z0 = svrbit_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u32_z.c new file mode 100644 index 000000000000..b8bfd68e00b2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u32_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** rbit_u32_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** rbit z0\.s, p0/z, \1\.s +** ret +*/ +TEST_UNIFORM_Z (rbit_u32_z_tied1, svuint32_t, + z0 = svrbit_u32_z (p0, z0), + z0 = svrbit_z (p0, z0)) + +/* +** rbit_u32_z_untied: +** rbit z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (rbit_u32_z_untied, svuint32_t, + z0 = svrbit_u32_z (p0, z1), + z0 = svrbit_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u64_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u64_z.c new file mode 100644 index 000000000000..2f2170098d1d --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u64_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** rbit_u64_z_tied1: +** mov (z[0-9]+\.d), z0\.d +** rbit z0\.d, p0/z, \1 +** ret +*/ +TEST_UNIFORM_Z (rbit_u64_z_tied1, svuint64_t, + z0 = svrbit_u64_z (p0, z0), + z0 = svrbit_z (p0, z0)) + +/* +** rbit_u64_z_untied: +** rbit z0\.d, p0/z, z1\.d +** ret +*/ +TEST_UNIFORM_Z (rbit_u64_z_untied, svuint64_t, + z0 = svrbit_u64_z (p0, z1), + z0 = svrbit_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u8_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u8_z.c new file mode 100644 index 000000000000..8590d3a26253 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rbit_u8_z.c @@ -0,0 +1,29 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** rbit_u8_z_tied1: +** mov (z[0-9]+)\.d, z0\.d +** rbit z0\.b, p0/z, \1\.b +** ret +*/ +TEST_UNIFORM_Z (rbit_u8_z_tied1, svuint8_t, + z0 = svrbit_u8_z (p0, z0), + z0 = svrbit_z (p0, z0)) + +/* +** rbit_u8_z_untied: +** rbit z0\.b, p0/z, z1\.b +** ret +*/ +TEST_UNIFORM_Z (rbit_u8_z_untied, svuint8_t, + z0 = svrbit_u8_z (p0, z1), + z0 = svrbit_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/recpe_u32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/recpe_u32_z.c new file mode 100644 index 000000000000..2df61d500c1a --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/recpe_u32_z.c @@ -0,0 +1,26 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ +#include "test_sve_acle.h" +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** recpe_u32_z_tied1: +** urecpe z0\.s, p0/z, z0\.s +** ret +*/ +TEST_UNIFORM_Z (recpe_u32_z_tied1, svuint32_t, + z0 = svrecpe_u32_z (p0, z0), + z0 = svrecpe_z (p0, z0)) + +/* +** recpe_u32_z_untied: +** urecpe z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (recpe_u32_z_untied, svuint32_t, + z0 = svrecpe_u32_z (p0, z1), + z0 = svrecpe_z (p0, z1)) diff --git a/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rsqrte_u32_z.c b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rsqrte_u32_z.c new file mode 100644 index 000000000000..352107082ebe --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve2/acle/asm/rsqrte_u32_z.c @@ -0,0 +1,28 @@ +/* { dg-do assemble { target aarch64_asm_sve2p2_ok } } */ +/* { dg-do compile { target { ! aarch64_asm_sve2p2_ok } } } */ +/* { dg-final { check-function-bodies "**" "" "-DCHECK_ASM" } } */ + +#include "test_sve_acle.h" + +#pragma GCC target "+sve2p2" +#ifdef STREAMING_COMPATIBLE +#pragma GCC target "+sme2p2" +#endif + +/* +** rsqrte_u32_z_tied1: +** ursqrte z0\.s, p0/z, z0\.s +** ret +*/ +TEST_UNIFORM_Z (rsqrte_u32_z_tied1, svuint32_t, + z0 = svrsqrte_u32_z (p0, z0), + z0 = svrsqrte_z (p0, z0)) + +/* +** rsqrte_u32_z_untied: +** ursqrte z0\.s, p0/z, z1\.s +** ret +*/ +TEST_UNIFORM_Z (rsqrte_u32_z_untied, svuint32_t, + z0 = svrsqrte_u32_z (p0, z1), + z0 = svrsqrte_z (p0, z1))
