https://gcc.gnu.org/g:03a6da1e6edb00de2d4a0554a901e7939749ffd4
commit r17-5217-g03a6da1e6edb00de2d4a0554a901e7939749ffd4 Author: Jakub Jelinek <[email protected]> Date: Thu Oct 15 11:07:27 2026 +0200 i386: Fix up VF48H_AVX512VL [PR121688] On Sun, Oct 11, 2026 at 08:24:59PM -0700, Hongtao Liu wrote: > With this condidtion extendv16hfv16sf is valid even w/o TARGET_AVX512F. > I suggest to change iterator VF48H_AVX512VL to (or add a new iterator) > > (define_mode_iterator VF48H_F16C > [(V8DF "TARGET_AVX512FP16") > (V16SF "TARGET_AVX512F") > (V8SF "TARGET_F16C || TARGET_AVX512VL")]) Sorry, I've missed the last line of your proposed change, changed the conditions as you've suggested but not this one. Here is a patch to change that, which improves code generation for -mf16c -mavx512fp16 -mno-avx512vl. 2026-10-15 Jakub Jelinek <[email protected]> PR target/121688 * config/i386/sse.md (VF48H_AVX512VL): Change V8SF condition to TARGET_F16C || TARGET_AVX512VL. * gcc.target/i386/pr121688-avx512fp16novl.c: New test. Reviewed-by: Uros Bizjak <[email protected]> Diff: --- gcc/config/i386/sse.md | 2 +- gcc/testsuite/gcc.target/i386/pr121688-avx512fp16novl.c | 14 ++++++++++++++ 2 files changed, 15 insertions(+), 1 deletion(-) diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 3a8ecfa3e395..1456c92e4981 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -1031,7 +1031,7 @@ (V4DI "TARGET_AVX512VL") (V4DF "TARGET_AVX512VL")]) (define_mode_iterator VF48H_AVX512VL [(V8DF "TARGET_AVX512FP16") (V16SF "TARGET_AVX512F") - (V8SF "TARGET_AVX512VL || (TARGET_F16C && !TARGET_AVX512FP16)")]) + (V8SF "TARGET_F16C || TARGET_AVX512VL")]) (define_mode_iterator VF48_128 [V2DF V4SF]) diff --git a/gcc/testsuite/gcc.target/i386/pr121688-avx512fp16novl.c b/gcc/testsuite/gcc.target/i386/pr121688-avx512fp16novl.c new file mode 100644 index 000000000000..e250cd19c77e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr121688-avx512fp16novl.c @@ -0,0 +1,14 @@ +/* PR target/121688 */ +/* { dg-do compile } */ +/* { dg-options "-O2 -mf16c -mavx512fp16 -mno-avx512vl -masm=att" } */ +/* { dg-final { scan-assembler-times "\tvcvtps2ph\t\\\$4, %xmm\[0-9]\+, %xmm\[0-9]\+" 2 } } */ +/* { dg-final { scan-assembler-times "\tvcvtps2ph\t\\\$4, %ymm\[0-9]\+, %xmm\[0-9]\+" 2 } } */ +/* { dg-final { scan-assembler-not "\tvcvtps2ph\t\\\$4, %zmm\[0-9]\+, %ymm\[0-9]\+" } } */ +/* { dg-final { scan-assembler "\tvcvtph2ps\t%xmm\[0-9]\+, %xmm\[0-9]\+" } } */ +/* { dg-final { scan-assembler "\tvcvtph2ps\t%xmm\[0-9]\+, %ymm\[0-9]\+" } } */ +/* { dg-final { scan-assembler-not "\tvcvtph2ps\t%ymm\[0-9]\+, %zmm\[0-9]\+" } } */ +/* { dg-final { scan-assembler "\tvcvtph2ps\t\\\(%\[re]\[a-z0-9]\+\\\), %xmm\[0-9]\+" } } */ +/* { dg-final { scan-assembler "\tvcvtph2ps\t\\\(%\[re]\[a-z0-9]\+\\\), %ymm\[0-9]\+" } } */ +/* { dg-final { scan-assembler-not "\tvcvtph2ps\t\\\(%\[re]\[a-z0-9]\+\\\), %zmm\[0-9]\+" } } */ + +#include "pr121688-f16c.c"
