https://gcc.gnu.org/g:7fbd8209fc43d33de7d56d61a53a570c8dfa8437
commit r17-5229-g7fbd8209fc43d33de7d56d61a53a570c8dfa8437 Author: John David Anglin <[email protected]> Date: Thu Oct 15 18:13:44 2026 -0400 hppa: Allow cross-class mode changes for TARGET_SOFT_FLOAT Floating-point register support is disabled for TARGET_SOFT_FLOAT, so we can allow cross-class mode changes. 2026-10-15 John David Anglin <[email protected]> gcc/ChangeLog: * config/pa/pa.cc (pa_can_change_mode_class): Don't reject cross-class mode changes when floating-point registers are disabled. Diff: --- gcc/config/pa/pa.cc | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/gcc/config/pa/pa.cc b/gcc/config/pa/pa.cc index 5e577af67c71..d65768125746 100644 --- a/gcc/config/pa/pa.cc +++ b/gcc/config/pa/pa.cc @@ -10635,7 +10635,8 @@ pa_can_change_mode_class (machine_mode from, machine_mode to, before reload completes. If the allocator is forced to use GENERAL_REGS, disallow the mode change so it forces a proper instruction breakdown. */ - if ((rclass == GENERAL_REGS || rclass == R1_REGS) + if (!TARGET_SOFT_FLOAT + && (rclass == GENERAL_REGS || rclass == R1_REGS) && !reload_completed && GET_MODE_SIZE (to) <= GET_MODE_SIZE (DFmode) && GET_MODE_SIZE (from) <= GET_MODE_SIZE (DFmode) @@ -10651,7 +10652,7 @@ pa_can_change_mode_class (machine_mode from, machine_mode to, of LOAD_EXTEND_OP. Thus, we reject all mode changes in the FP registers except for DImode to SImode on the 64-bit target. It is handled by register renaming in pa_print_operand. */ - if (MAYBE_FP_REG_CLASS_P (rclass)) + if (!TARGET_SOFT_FLOAT && MAYBE_FP_REG_CLASS_P (rclass)) return TARGET_64BIT && from == DImode && to == SImode; /* TARGET_HARD_REGNO_MODE_OK places modes with sizes larger than a word
