On Wed, Mar 30, 2011 at 4:11 PM, Aldy Hernandez <al...@redhat.com> wrote: > >> The memory model is not implementable on strict-alignment targets >> that do not have a byte store operation. But we previously said that ;) > > Yes. I think we should issue an error when we have such a target and the > user tries -fmemory-model=c++0x. However, how many strict-alignment targets > are not byte addressable nowadays? > >> Also consider global vars >> >> char a; >> char b; >> >> accessing them on strict-align targets may access adjacent globals >> (that's a problem anyway, also with alias analysis). > > Good point. I am adding a test to that effect (see attached patch). > > BTW, I assume you mean strict-align targets WITHOUT byte-addressability as > above. I have spot-checked your scenario on a handful of important targets > that have strict alignment, and all of them work without touching adjacent > global vars: > > arm-elf OK > sparc-linux OK > ia64-linux OK > alpha-linux OK, but only with -mbwx (byte addressability) > > rth tells me that we shouldn't worry about ancient non-byte addressable > Alphas, so the last isn't an issue. > > So... do you have any important targets in mind, because I don't see this > being a problem for most targets? As can be expected, I am only interested > in x86*, powerpc*, and s390, especially since a cursory glance on other > important targets didn't exhibit any problems. However, given my target > bias, I am willing to look into any important targets that are problematic > (I'm hoping none :)).
Well, I'm not sure that strict-align targets that provide byte access do not simply hide the issue inside the CPU (thus, perform the read-modify-write there and do not guarantee any atomicity unless you ask for it). It might be even worse - targets might not even guarantee this for shared cache-lines (for non-ccNUMA architectures). But I'm no expert here, but certainly every possible weird CPU architecture has been implemented. Richard.