This patch series is a follow-up of the conversion of my existing
testsuite into DejaGnu. It does not yet cover all the tests I wrote,
but I chose to post this set to have a chance to have it accepted
before stage 4. I will have 35 more files to convert after this set.
Most of the patches only add new tests/files, but a few modify
existing files as follows:
Patch 1: Fix dependency for Neon cumulative saturation (QC) flag.
Patch 2: Add traces in the CHECK* macro, to assert that a test was
actually executed.
Patch 8: Refactor vuzp and vzip tests.
Patch 9: Split vaddhn.c into vXXXhn.inc and vaddhn.c to share code
with other new tests.
Patch 19: Put most of the code in common with vaddl in vXXXl.inc.
Patch 20: Put most of the code in common with vaddw through vXXWw.inc
Christophe Lyon (36):
Add explicit dependency on Neon Cumulative Saturation flag (QC).
Be more verbose, and actually confirm that a test was checked.
Add vmax, vmin, vhadd, vhsub and vrhadd tests.
Add vld1_lane tests.
Add vldX_dup test.
Add vmla and vmls tests.
Add vmla_lane and vmls_lane tests.
Add vtrn tests. Refactor vzup and vzip tests.
Add vsubhn, vraddhn and vrsubhn tests. Split vaddhn.c into vXXXhn.inc
and vaddhn.c to share code with other new tests.
Add vmlal and vmlsl tests.
Add vmlal_lane and vmlsl_lane tests.
Add vmlal_n and vmlsl_n tests.
Add vmla_n and vmls_n tests.
Add vqdmlal and vqdmlsl tests.
Add vqdmlal_lane and vqdmlsl_lane tests.
Add vqdmlal_n and vqdmlsl_n tests.
Add vpadd, vpmax and vpmin tests.
Add vsli_n and vsri_n tests.
Add vsubl tests, put most of the code in common with vaddl in
vXXXl.inc.
Add vsubw tests, putting most of the code in common with vaddw through
vXXWw.inc
Add vmovl tests.
Add vmovn tests.
Add vmul_lane tests.
Add vmul_n tests.
Add vmull tests.
Add vmull_lane tests.
Add vmull_n tests.
Add vmnv tests.
Add vpadal tests.
Add vpaddl tests.
Add vqdmulh tests.
Add vqdmulh_lane tests.
Add vqdmulh_n tests.
Add vqdmull tests.
Add vqdmull_lane tests.
Add vqdmull_n tests.
.../aarch64/advsimd-intrinsics/arm-neon-ref.h | 35 +-
.../aarch64/advsimd-intrinsics/binary_op_no64.inc | 120 ++++
.../aarch64/advsimd-intrinsics/binary_sat_op.inc | 2 +-
.../aarch64/advsimd-intrinsics/unary_sat_op.inc | 2 +-
.../aarch64/advsimd-intrinsics/vXXXhn.inc | 50 ++
.../aarch64/advsimd-intrinsics/vXXXl.inc | 70 +++
.../aarch64/advsimd-intrinsics/vXXXw.inc | 70 +++
.../gcc.target/aarch64/advsimd-intrinsics/vaddhn.c | 57 +-
.../gcc.target/aarch64/advsimd-intrinsics/vaddl.c | 77 +--
.../gcc.target/aarch64/advsimd-intrinsics/vaddw.c | 77 +--
.../gcc.target/aarch64/advsimd-intrinsics/vhadd.c | 54 ++
.../gcc.target/aarch64/advsimd-intrinsics/vhsub.c | 52 ++
.../aarch64/advsimd-intrinsics/vld1_lane.c | 129 ++++
.../aarch64/advsimd-intrinsics/vldX_dup.c | 671 +++++++++++++++++++++
.../gcc.target/aarch64/advsimd-intrinsics/vmax.c | 64 ++
.../gcc.target/aarch64/advsimd-intrinsics/vmin.c | 66 ++
.../gcc.target/aarch64/advsimd-intrinsics/vmlX.inc | 110 ++++
.../aarch64/advsimd-intrinsics/vmlX_lane.inc | 91 +++
.../aarch64/advsimd-intrinsics/vmlX_n.inc | 78 +++
.../aarch64/advsimd-intrinsics/vmlXl.inc | 89 +++
.../aarch64/advsimd-intrinsics/vmlXl_lane.inc | 70 +++
.../aarch64/advsimd-intrinsics/vmlXl_n.inc | 61 ++
.../gcc.target/aarch64/advsimd-intrinsics/vmla.c | 50 ++
.../aarch64/advsimd-intrinsics/vmla_lane.c | 50 ++
.../gcc.target/aarch64/advsimd-intrinsics/vmla_n.c | 50 ++
.../gcc.target/aarch64/advsimd-intrinsics/vmlal.c | 18 +
.../aarch64/advsimd-intrinsics/vmlal_lane.c | 14 +
.../aarch64/advsimd-intrinsics/vmlal_n.c | 14 +
.../gcc.target/aarch64/advsimd-intrinsics/vmls.c | 52 ++
.../aarch64/advsimd-intrinsics/vmls_lane.c | 52 ++
.../gcc.target/aarch64/advsimd-intrinsics/vmls_n.c | 52 ++
.../gcc.target/aarch64/advsimd-intrinsics/vmlsl.c | 22 +
.../aarch64/advsimd-intrinsics/vmlsl_lane.c | 18 +
.../aarch64/advsimd-intrinsics/vmlsl_n.c | 18 +
.../gcc.target/aarch64/advsimd-intrinsics/vmovl.c | 77 +++
.../gcc.target/aarch64/advsimd-intrinsics/vmovn.c | 50 ++
.../aarch64/advsimd-intrinsics/vmul_lane.c | 104 ++++
.../gcc.target/aarch64/advsimd-intrinsics/vmul_n.c | 96 +++
.../gcc.target/aarch64/advsimd-intrinsics/vmull.c | 75 +++
.../aarch64/advsimd-intrinsics/vmull_lane.c | 66 ++
.../aarch64/advsimd-intrinsics/vmull_n.c | 61 ++
.../gcc.target/aarch64/advsimd-intrinsics/vmvn.c | 136 +++++
.../aarch64/advsimd-intrinsics/vpXXX.inc | 67 ++
.../gcc.target/aarch64/advsimd-intrinsics/vpadal.c | 155 +++++
.../gcc.target/aarch64/advsimd-intrinsics/vpadd.c | 19 +
.../gcc.target/aarch64/advsimd-intrinsics/vpaddl.c | 129 ++++
.../gcc.target/aarch64/advsimd-intrinsics/vpmax.c | 20 +
.../gcc.target/aarch64/advsimd-intrinsics/vpmin.c | 20 +
.../aarch64/advsimd-intrinsics/vqdmlXl.inc | 63 ++
.../aarch64/advsimd-intrinsics/vqdmlXl_lane.inc | 73 +++
.../aarch64/advsimd-intrinsics/vqdmlXl_n.inc | 59 ++
.../aarch64/advsimd-intrinsics/vqdmlal.c | 27 +
.../aarch64/advsimd-intrinsics/vqdmlal_lane.c | 38 ++
.../aarch64/advsimd-intrinsics/vqdmlal_n.c | 27 +
.../aarch64/advsimd-intrinsics/vqdmlsl.c | 29 +
.../aarch64/advsimd-intrinsics/vqdmlsl_lane.c | 40 ++
.../aarch64/advsimd-intrinsics/vqdmlsl_n.c | 29 +
.../aarch64/advsimd-intrinsics/vqdmulh.c | 122 ++++
.../aarch64/advsimd-intrinsics/vqdmulh_lane.c | 121 ++++
.../aarch64/advsimd-intrinsics/vqdmulh_n.c | 110 ++++
.../aarch64/advsimd-intrinsics/vqdmull.c | 86 +++
.../aarch64/advsimd-intrinsics/vqdmull_lane.c | 94 +++
.../aarch64/advsimd-intrinsics/vqdmull_n.c | 92 +++
.../aarch64/advsimd-intrinsics/vraddhn.c | 58 ++
.../gcc.target/aarch64/advsimd-intrinsics/vrhadd.c | 54 ++
.../aarch64/advsimd-intrinsics/vrsubhn.c | 58 ++
.../aarch64/advsimd-intrinsics/vsXi_n.inc | 82 +++
.../aarch64/advsimd-intrinsics/vshuffle.inc | 139 +++++
.../gcc.target/aarch64/advsimd-intrinsics/vsli_n.c | 162 +++++
.../gcc.target/aarch64/advsimd-intrinsics/vsri_n.c | 164 +++++
.../gcc.target/aarch64/advsimd-intrinsics/vsubhn.c | 58 ++
.../gcc.target/aarch64/advsimd-intrinsics/vsubl.c | 48 ++
.../gcc.target/aarch64/advsimd-intrinsics/vsubw.c | 50 ++
.../gcc.target/aarch64/advsimd-intrinsics/vtrn.c | 93 +++
.../gcc.target/aarch64/advsimd-intrinsics/vuzp.c | 142 +----
.../gcc.target/aarch64/advsimd-intrinsics/vzip.c | 142 +----
76 files changed, 5342 insertions(+), 498 deletions(-)
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/binary_op_no64.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXhn.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXl.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vXXXw.inc
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vhadd.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vhsub.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vld1_lane.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vldX_dup.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmax.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmin.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlX.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlX_lane.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlX_n.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlXl.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlXl_lane.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlXl_n.inc
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmla.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmla_lane.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmla_n.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlal.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlal_lane.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlal_n.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmls.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmls_lane.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmls_n.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlsl.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlsl_lane.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmlsl_n.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmovl.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmovn.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_lane.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmul_n.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull_lane.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmull_n.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vmvn.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpXXX.inc
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpadal.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpadd.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpaddl.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpmax.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vpmin.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlXl.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlXl_lane.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlXl_n.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlal.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlal_lane.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlal_n.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlsl.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlsl_lane.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmlsl_n.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmulh.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmulh_lane.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmulh_n.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull_lane.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqdmull_n.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vraddhn.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrhadd.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrsubhn.c
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsXi_n.inc
create mode 100644
gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vshuffle.inc
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsli_n.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsri_n.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubhn.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubl.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vsubw.c
create mode 100644 gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtrn.c
--
2.1.0
