Hi, This patch fixes aarch64/atomic-op-consume.c test to expect safe "LDAXR" instruction to be generated when __ATOMIC_CONSUME semantics is requested.
This patch was tested by running the modified test on aarch64-none-elf compiler. Is this patch ok? Alex 2015-01-27 Alex Velenko <alex.vele...@arm.com> gcc/testsuite/ * gcc.target/aarch64/atomic-op-consume.c (scan-assember-times): Adjust scan-assembler-times pattern. diff --git a/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c b/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c index 38d6c2c..7ece5b1 100644 --- a/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c +++ b/gcc/testsuite/gcc.target/aarch64/atomic-op-consume.c @@ -3,5 +3,8 @@ #include "atomic-op-consume.x" -/* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ +/* To workaround Bugzilla 59448 issue, a request for __ATOMIC_CONSUME is always + promoted to __ATOMIC_ACQUIRE, implemented as MEMMODEL_ACQUIRE. This causes + "LDAXR" to be generated instead of "LDXR". */ +/* { dg-final { scan-assembler-times "ldaxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */ /* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, \\\[x\[0-9\]+\\\]" 6 } } */