On 18/05/15 11:32, Richard Biener wrote:
On Wed, May 13, 2015 at 5:33 PM, Kyrill Tkachov
<kyrylo.tkac...@foss.arm.com> wrote:
Hi Richard,
On 13/05/15 12:27, Richard Biener wrote:
I notice that we don't have a testuite check that the target has
a hw sqrt instructions. Would you like me to add one? Or can I make
the testcase aarch64-specific?
Would be great to have a testsuite check for this.
I've committed the patch with r223167.
The attached patch adds a testsuite check for hardware sqrt instructions.
In this version I've included arm (on the condition that vfp is possible),
aarch64, x86_64 and powerpc with vsx.
Is this definition ok?
I'm particularly not familiar with the powerpc architectures.
With this check in place, I've migrated the pow synthesis test from
gcc.target/aarch64 to gcc.dg.
This test passes on arm-none-eabi, aarch64-none-elf and x86_64-linux.
Ok?
Ok.
Thanks.
However, after some discussion on IRC I'd prefer to rename the testsuite check
to sqrt_insn so as not to give the impression that it is a runtime hardware
check.
Also, this version adds an entry in sourcebuild.texi.
I'll commit this version in 24 hours unless someone objects.
Test still passes on arm, x86_64 and aarch64.
Cheers,
Kyrill
2015-05-20 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* lib/target-supports.exp (check_effective_target_sqrt_insn): New check.
* gcc.dg/pow-sqrt-synth-1.c: New test.
* gcc.target/aarch64/pow-sqrt-synth-1.c: Delete.
2015-05-20 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* doc/sourcebuild.texi (7.2.3.9 Other hardware attributes):
Document sqrt_insn.
Thanks,
Richard.
2015-05-13 Kyrylo Tkachov <kyrylo.tkac...@arm.com>
* lib/target-supports.exp (check_effective_target_hw_sqrt): New check.
* gcc.dg/pow-sqrt-synth-1.c: New test.
* gcc.target/aarch64/pow-sqrt-synth-1.c: Delete.
commit e35362535c9888daf00d1430e2d3a932d7ece228
Author: Kyrylo Tkachov <kyrylo.tkac...@arm.com>
Date: Wed May 13 16:08:03 2015 +0100
Add testsuite check for hw sqrt. Add generic test for pow sqrt synthesis
diff --git a/gcc/doc/sourcebuild.texi b/gcc/doc/sourcebuild.texi
index c6ef40e..abe0779 100644
--- a/gcc/doc/sourcebuild.texi
+++ b/gcc/doc/sourcebuild.texi
@@ -1695,6 +1695,9 @@ Target supports FPU instructions.
@item non_strict_align
Target does not require strict alignment.
+@item sqrt_insn
+Target has a square root instruction that the compiler can generate.
+
@item sse
Target supports compiling @code{sse} instructions.
diff --git a/gcc/testsuite/gcc.dg/pow-sqrt-synth-1.c b/gcc/testsuite/gcc.dg/pow-sqrt-synth-1.c
new file mode 100644
index 0000000..d55b626
--- /dev/null
+++ b/gcc/testsuite/gcc.dg/pow-sqrt-synth-1.c
@@ -0,0 +1,38 @@
+/* { dg-do compile { target sqrt_insn } } */
+/* { dg-options "-fdump-tree-sincos -Ofast --param max-pow-sqrt-depth=8" } */
+/* { dg-additional-options "-mfloat-abi=softfp -mfpu=neon-vfpv4" { target arm*-*-* } } */
+
+double
+foo (double a)
+{
+ return __builtin_pow (a, -5.875);
+}
+
+double
+foof (double a)
+{
+ return __builtin_pow (a, 0.75f);
+}
+
+double
+bar (double a)
+{
+ return __builtin_pow (a, 1.0 + 0.00390625);
+}
+
+double
+baz (double a)
+{
+ return __builtin_pow (a, -1.25) + __builtin_pow (a, 5.75) - __builtin_pow (a, 3.375);
+}
+
+#define N 256
+void
+vecfoo (double *a)
+{
+ for (int i = 0; i < N; i++)
+ a[i] = __builtin_pow (a[i], 1.25);
+}
+
+/* { dg-final { scan-tree-dump-times "synthesizing" 7 "sincos" } } */
+/* { dg-final { cleanup-tree-dump "sincos" } } */
diff --git a/gcc/testsuite/gcc.target/aarch64/pow-sqrt-synth-1.c b/gcc/testsuite/gcc.target/aarch64/pow-sqrt-synth-1.c
deleted file mode 100644
index 52514fb..0000000
--- a/gcc/testsuite/gcc.target/aarch64/pow-sqrt-synth-1.c
+++ /dev/null
@@ -1,38 +0,0 @@
-/* { dg-do compile } */
-/* { dg-options "-fdump-tree-sincos -Ofast --param max-pow-sqrt-depth=8" } */
-
-
-double
-foo (double a)
-{
- return __builtin_pow (a, -5.875);
-}
-
-double
-foof (double a)
-{
- return __builtin_pow (a, 0.75f);
-}
-
-double
-bar (double a)
-{
- return __builtin_pow (a, 1.0 + 0.00390625);
-}
-
-double
-baz (double a)
-{
- return __builtin_pow (a, -1.25) + __builtin_pow (a, 5.75) - __builtin_pow (a, 3.375);
-}
-
-#define N 256
-void
-vecfoo (double *a)
-{
- for (int i = 0; i < N; i++)
- a[i] = __builtin_pow (a[i], 1.25);
-}
-
-/* { dg-final { scan-tree-dump-times "synthesizing" 7 "sincos" } } */
-/* { dg-final { cleanup-tree-dump "sincos" } } */
\ No newline at end of file
diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp
index 3728927..e3c4416 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -4668,6 +4668,27 @@ proc check_effective_target_vect_call_copysignf { } {
return $et_vect_call_copysignf_saved
}
+# Return 1 if the target supports hardware square root instructions.
+
+proc check_effective_target_sqrt_insn { } {
+ global et_sqrt_insn_saved
+
+ if [info exists et_sqrt_insn_saved] {
+ verbose "check_effective_target_hw_sqrt: using cached result" 2
+ } else {
+ set et_sqrt_insn_saved 0
+ if { [istarget x86_64-*-*]
+ || [istarget powerpc*-*-*]
+ || [istarget aarch64*-*-*]
+ || ([istarget arm*-*-*] && [check_effective_target_arm_vfp_ok]) } {
+ set et_sqrt_insn_saved 1
+ }
+ }
+
+ verbose "check_effective_target_hw_sqrt: returning et_sqrt_insn_saved" 2
+ return $et_sqrt_insn_saved
+}
+
# Return 1 if the target supports vector sqrtf calls.
proc check_effective_target_vect_call_sqrtf { } {