Hello! > This patch removes the special casing for targets with relaxed memory > ordering and handles > guard accesses with equivalent atomic load acquire operations. In this > process we change the > algorithm to load the guard variable with an atomic load that has ACQUIRE > semantics. I'm not > terribly familiar with the C++ front-end so I'm not sure I've used the > appropriate interfaces for > doing something like this. > > This then means that on targets which have weak memory models, the fast path > is inlined and can > directly use a load-acquire instruction where available (and yay! one more > hook gone). > > Currently bootstrapping and regression testing on AArch64 and ARM (prior to > the commit that > caused PR66241). If this goes in then I'm happy to withdraw part of the > patches to trunk for > AArch64 / ARM that defines TARGET_RELAXED_ORDERING and only propose those > hunks to > the branches. > > I'd also request the other target maintainers CC'd to help by testing this on > their platforms as I > do not have access to all of them.
The patch works OK on alphaev68-linux-gnu [1]. [1] https://gcc.gnu.org/ml/gcc-testresults/2015-05/msg03008.html Uros.
