Early variants of LEON3, revision 0, do not support the CASA instruction.
This patch adds two new targets, leon3r0 and leon3r0v7, that are equivalent
to leon3 and leon3v7, except that they do not support CASA.

gcc/ChangeLog:

2015-06-22  Daniel Cederman  <ceder...@gaisler.com>

        * config.gcc: Add leon3r0[v7] targets
        * config/sparc/leon.md: Add leon3r0[v7] to FPU timing
        * config/sparc/sparc-opts.h (enum processor_type): Add leon3r0[v7] 
targets
        * config/sparc/sparc.c (sparc_option_override): Add leon3r0[v7] as 
targets
          without CASA support
        * config/sparc/sparc.h: Add leon3r0[v7] targets
        * config/sparc/sparc.md: Add leon3r0[v7] targets
        * config/sparc/sparc.opt: Add leon3r0[v7] targets
        * doc/invoke.texi: Add leon3r0[v7] targets
---
 gcc/config.gcc                |  6 ++----
 gcc/config/sparc/leon.md      | 14 +++++++-------
 gcc/config/sparc/sparc-opts.h |  2 ++
 gcc/config/sparc/sparc.c      |  4 ++++
 gcc/config/sparc/sparc.h      | 44 ++++++++++++++++++++++++-------------------
 gcc/config/sparc/sparc.md     |  2 ++
 gcc/config/sparc/sparc.opt    |  6 ++++++
 gcc/doc/invoke.texi           | 22 +++++++++++-----------
 8 files changed, 59 insertions(+), 41 deletions(-)

diff --git a/gcc/config.gcc b/gcc/config.gcc
index 805638d..b10a1c9 100644
--- a/gcc/config.gcc
+++ b/gcc/config.gcc
@@ -3322,10 +3322,7 @@ if test x$with_cpu = x ; then
          with_cpu=leon
          ;;
        *-leon[3-9]*)
-         with_cpu=leon3
-         ;;
-       *-leon[3-9]v7*)
-         with_cpu=leon3v7
+         with_cpu="`echo ${target} | sed 's/.*-\(leon[a-z0-9]*\).*$/\1/'`"
          ;;
        *)
          with_cpu="`echo ${target} | sed 's/-.*$//'`"
@@ -4198,6 +4195,7 @@ case "${target}" in
                        "" | sparc | sparcv9 | sparc64 \
                        | v7 | cypress \
                        | v8 | supersparc | hypersparc | leon | leon3 | leon3v7 
\
+                       | leon3r0 | leon3r0v7 \
                        | sparclite | f930 | f934 | sparclite86x \
                        | sparclet | tsc701 \
                        | v9 | ultrasparc | ultrasparc3 | niagara | niagara2 \
diff --git a/gcc/config/sparc/leon.md b/gcc/config/sparc/leon.md
index aca92fc..3441a74 100644
--- a/gcc/config/sparc/leon.md
+++ b/gcc/config/sparc/leon.md
@@ -29,11 +29,11 @@
 
 ;; Use a double reservation to work around the load pipeline hazard on UT699.
 (define_insn_reservation "leon3_load" 1
-  (and (eq_attr "cpu" "leon3,leon3v7") (eq_attr "type" "load,sload"))
+  (and (eq_attr "cpu" "leon3,leon3v7,leon3r0,leon3r0v7") (eq_attr "type" 
"load,sload"))
   "leon_memory*2")
 
 (define_insn_reservation "leon_store" 2
-  (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "store"))
+  (and (eq_attr "cpu" "leon,leon3,leon3v7,leon3r0,leon3r0v7") (eq_attr "type" 
"store"))
   "leon_memory*2")
 
 ;; This describes Gaisler Research's FPU
@@ -44,21 +44,21 @@
 (define_cpu_unit "grfpu_ds" "grfpu")
 
 (define_insn_reservation "leon_fp_alu" 4
-  (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fp,fpcmp,fpmul"))
+  (and (eq_attr "cpu" "leon,leon3,leon3v7,leon3r0,leon3r0v7") (eq_attr "type" 
"fp,fpcmp,fpmul"))
   "grfpu_alu, nothing*3")
 
 (define_insn_reservation "leon_fp_divs" 16
-  (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fpdivs"))
+  (and (eq_attr "cpu" "leon,leon3,leon3v7,leon3r0,leon3r0v7") (eq_attr "type" 
"fpdivs"))
   "grfpu_ds*14, nothing*2")
 
 (define_insn_reservation "leon_fp_divd" 17
-  (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fpdivd"))
+  (and (eq_attr "cpu" "leon,leon3,leon3v7,leon3r0,leon3r0v7") (eq_attr "type" 
"fpdivd"))
   "grfpu_ds*15, nothing*2")
 
 (define_insn_reservation "leon_fp_sqrts" 24
-  (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fpsqrts"))
+  (and (eq_attr "cpu" "leon,leon3,leon3v7,leon3r0,leon3r0v7") (eq_attr "type" 
"fpsqrts"))
   "grfpu_ds*22, nothing*2")
 
 (define_insn_reservation "leon_fp_sqrtd" 25
-  (and (eq_attr "cpu" "leon,leon3,leon3v7") (eq_attr "type" "fpsqrtd"))
+  (and (eq_attr "cpu" "leon,leon3,leon3v7,leon3r0,leon3r0v7") (eq_attr "type" 
"fpsqrtd"))
   "grfpu_ds*23, nothing*2")
diff --git a/gcc/config/sparc/sparc-opts.h b/gcc/config/sparc/sparc-opts.h
index 7679d0d..24a2b64 100644
--- a/gcc/config/sparc/sparc-opts.h
+++ b/gcc/config/sparc/sparc-opts.h
@@ -30,6 +30,8 @@ enum processor_type {
   PROCESSOR_SUPERSPARC,
   PROCESSOR_HYPERSPARC,
   PROCESSOR_LEON,
+  PROCESSOR_LEON3R0,
+  PROCESSOR_LEON3R0V7,
   PROCESSOR_LEON3,
   PROCESSOR_LEON3V7,
   PROCESSOR_SPARCLITE,
diff --git a/gcc/config/sparc/sparc.c b/gcc/config/sparc/sparc.c
index 205e3cb..862e88d 100644
--- a/gcc/config/sparc/sparc.c
+++ b/gcc/config/sparc/sparc.c
@@ -1280,6 +1280,8 @@ sparc_option_override (void)
     { "supersparc",    MASK_ISA, MASK_V8 },
     { "hypersparc",    MASK_ISA, MASK_V8|MASK_FPU },
     { "leon",          MASK_ISA, MASK_V8|MASK_LEON|MASK_FPU },
+    { "leon3r0",       MASK_ISA, MASK_V8|MASK_LEON3|MASK_FPU },
+    { "leon3r0v7",     MASK_ISA, MASK_LEON3|MASK_FPU },
     { "leon3",         MASK_ISA, MASK_V8|MASK_LEON3|MASK_FPU|MASK_LEON_CASA },
     { "leon3v7",       MASK_ISA, MASK_LEON3|MASK_FPU|MASK_LEON_CASA },
     { "sparclite",     MASK_ISA, MASK_SPARCLITE },
@@ -1533,6 +1535,8 @@ sparc_option_override (void)
     case PROCESSOR_LEON:
       sparc_costs = &leon_costs;
       break;
+    case PROCESSOR_LEON3R0:
+    case PROCESSOR_LEON3R0V7:
     case PROCESSOR_LEON3:
     case PROCESSOR_LEON3V7:
       sparc_costs = &leon3_costs;
diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h
index 72dd18b..2e4c03a 100644
--- a/gcc/config/sparc/sparc.h
+++ b/gcc/config/sparc/sparc.h
@@ -125,23 +125,25 @@ extern enum cmodel sparc_cmodel;
 #define TARGET_CPU_supersparc  2
 #define TARGET_CPU_hypersparc  3
 #define TARGET_CPU_leon                4
-#define TARGET_CPU_leon3       5
-#define TARGET_CPU_leon3v7     6
-#define TARGET_CPU_sparclite   7
-#define TARGET_CPU_f930                7       /* alias */
-#define TARGET_CPU_f934                7       /* alias */
-#define TARGET_CPU_sparclite86x        8
-#define TARGET_CPU_sparclet    9
-#define TARGET_CPU_tsc701      9       /* alias */
-#define TARGET_CPU_v9          10      /* generic v9 implementation */
-#define TARGET_CPU_sparcv9     10      /* alias */
-#define TARGET_CPU_sparc64     10      /* alias */
-#define TARGET_CPU_ultrasparc  11
-#define TARGET_CPU_ultrasparc3 12
-#define TARGET_CPU_niagara     13
-#define TARGET_CPU_niagara2    14
-#define TARGET_CPU_niagara3    15
-#define TARGET_CPU_niagara4    16
+#define TARGET_CPU_leon3r0     5
+#define TARGET_CPU_leon3r0v7   6
+#define TARGET_CPU_leon3       7
+#define TARGET_CPU_leon3v7     8
+#define TARGET_CPU_sparclite   9
+#define TARGET_CPU_f930                9       /* alias */
+#define TARGET_CPU_f934                9       /* alias */
+#define TARGET_CPU_sparclite86x        10
+#define TARGET_CPU_sparclet    11
+#define TARGET_CPU_tsc701      11      /* alias */
+#define TARGET_CPU_v9          12      /* generic v9 implementation */
+#define TARGET_CPU_sparcv9     12      /* alias */
+#define TARGET_CPU_sparc64     12      /* alias */
+#define TARGET_CPU_ultrasparc  13
+#define TARGET_CPU_ultrasparc3 14
+#define TARGET_CPU_niagara     15
+#define TARGET_CPU_niagara2    16
+#define TARGET_CPU_niagara3    17
+#define TARGET_CPU_niagara4    18
 
 #if TARGET_CPU_DEFAULT == TARGET_CPU_v9 \
  || TARGET_CPU_DEFAULT == TARGET_CPU_ultrasparc \
@@ -224,12 +226,14 @@ extern enum cmodel sparc_cmodel;
 #endif
 
 #if TARGET_CPU_DEFAULT == TARGET_CPU_leon \
- || TARGET_CPU_DEFAULT == TARGET_CPU_leon3
+ || TARGET_CPU_DEFAULT == TARGET_CPU_leon3 \
+ || TARGET_CPU_DEFAULT == TARGET_CPU_leon3r0
 #define CPP_CPU32_DEFAULT_SPEC "-D__leon__ -D__sparc_v8__"
 #define ASM_CPU32_DEFAULT_SPEC AS_LEON_FLAG
 #endif
 
-#if TARGET_CPU_DEFAULT == TARGET_CPU_leon3v7
+#if TARGET_CPU_DEFAULT == TARGET_CPU_leon3v7 \
+ || TARGET_CPU_DEFAULT == TARGET_CPU_leon3r0v7
 #define CPP_CPU32_DEFAULT_SPEC "-D__leon__"
 #define ASM_CPU32_DEFAULT_SPEC AS_LEONV7_FLAG
 #endif
@@ -279,6 +283,8 @@ extern enum cmodel sparc_cmodel;
 %{mcpu=supersparc:-D__supersparc__ -D__sparc_v8__} \
 %{mcpu=hypersparc:-D__hypersparc__ -D__sparc_v8__} \
 %{mcpu=leon:-D__leon__ -D__sparc_v8__} \
+%{mcpu=leon3r0:-D__leon__ -D__sparc_v8__} \
+%{mcpu=leon3r0v7:-D__leon__} \
 %{mcpu=leon3:-D__leon__ -D__sparc_v8__} \
 %{mcpu=leon3v7:-D__leon__} \
 %{mcpu=v9:-D__sparc_v9__} \
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index a561877..672248e 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -220,6 +220,8 @@
    supersparc,
    hypersparc,
    leon,
+   leon3r0,
+   leon3r0v7,
    leon3,
    leon3v7,
    sparclite,
diff --git a/gcc/config/sparc/sparc.opt b/gcc/config/sparc/sparc.opt
index e6caa95..6cd1e09 100644
--- a/gcc/config/sparc/sparc.opt
+++ b/gcc/config/sparc/sparc.opt
@@ -154,6 +154,12 @@ EnumValue
 Enum(sparc_processor_type) String(leon) Value(PROCESSOR_LEON)
 
 EnumValue
+Enum(sparc_processor_type) String(leon3r0) Value(PROCESSOR_LEON3R0)
+
+EnumValue
+Enum(sparc_processor_type) String(leon3r0v7) Value(PROCESSOR_LEON3R0V7)
+
+EnumValue
 Enum(sparc_processor_type) String(leon3) Value(PROCESSOR_LEON3)
 
 EnumValue
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 211e8e9..2110bf8 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -21329,10 +21329,10 @@ the rules of the ABI@.
 Set the instruction set, register set, and instruction scheduling parameters
 for machine type @var{cpu_type}.  Supported values for @var{cpu_type} are
 @samp{v7}, @samp{cypress}, @samp{v8}, @samp{supersparc}, @samp{hypersparc},
-@samp{leon}, @samp{leon3}, @samp{leon3v7}, @samp{sparclite}, @samp{f930},
-@samp{f934}, @samp{sparclite86x}, @samp{sparclet}, @samp{tsc701}, @samp{v9},
-@samp{ultrasparc}, @samp{ultrasparc3}, @samp{niagara}, @samp{niagara2},
-@samp{niagara3} and @samp{niagara4}.
+@samp{leon}, @samp{leon3r0}, @samp{leon3r0v7}, @samp{leon3}, @samp{leon3v7},
+@samp{sparclite}, @samp{f930}, @samp{f934}, @samp{sparclite86x}, 
@samp{sparclet},
+@samp{tsc701}, @samp{v9}, @samp{ultrasparc}, @samp{ultrasparc3}, 
@samp{niagara},
+@samp{niagara2}, @samp{niagara3} and @samp{niagara4}.
 
 Native Solaris and GNU/Linux toolchains also support the value @samp{native},
 which selects the best architecture option for the host processor.
@@ -21348,10 +21348,10 @@ implementations.
 
 @table @asis
 @item v7
-cypress, leon3v7
+cypress, leon3r0v7, leon3v7
 
 @item v8
-supersparc, hypersparc, leon, leon3
+supersparc, hypersparc, leon, leon3r0, leon3
 
 @item sparclite
 f930, f934, sparclite86x
@@ -21413,11 +21413,11 @@ option @option{-mcpu=@var{cpu_type}} does.
 The same values for @option{-mcpu=@var{cpu_type}} can be used for
 @option{-mtune=@var{cpu_type}}, but the only useful values are those
 that select a particular CPU implementation.  Those are @samp{cypress},
-@samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{leon3},
-@samp{leon3v7}, @samp{f930}, @samp{f934}, @samp{sparclite86x}, @samp{tsc701},
-@samp{ultrasparc}, @samp{ultrasparc3}, @samp{niagara}, @samp{niagara2},
-@samp{niagara3} and @samp{niagara4}.  With native Solaris and GNU/Linux
-toolchains, @samp{native} can also be used.
+@samp{supersparc}, @samp{hypersparc}, @samp{leon}, @samp{leon3r0},
+@samp{leon3r0v7}, @samp{leon3}, @samp{leon3v7}, @samp{f930}, @samp{f934},
+@samp{sparclite86x}, @samp{tsc701}, @samp{ultrasparc}, @samp{ultrasparc3},
+@samp{niagara}, @samp{niagara2}, @samp{niagara3} and @samp{niagara4}.
+With native Solaris and GNU/Linux toolchains, @samp{native} can also be used.
 
 @item -mv8plus
 @itemx -mno-v8plus
-- 
2.4.3

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