On Fri, Jun 26, 2015 at 01:10:21PM +0100, Matthew Wahab wrote: > This patch backports the tests added for the code generated by the Aarch64 > backend > for the __sync builtins. > > The trunk patch submission is at > https://gcc.gnu.org/ml/gcc-patches/2015-05/msg01992.html > The commit is at https://gcc.gnu.org/ml/gcc-cvs/2015-06/msg00079.html > > Tested the series for aarch64-none-linux-gnu with check-gcc > > Ok for the branch? > Matthew
OK. Thanks, James > > 2015-06-26 Matthew Wahab <matthew.wa...@arm.com> > > Backport from trunk > 2015-06-01 Matthew Wahab <matthew.wa...@arm.com> > > PR target/65697 > * gcc.target/aarch64/sync-comp-swap.c: New. > * gcc.target/aarch64/sync-comp-swap.x: New. > * gcc.target/aarch64/sync-op-acquire.c: New. > * gcc.target/aarch64/sync-op-acquire.x: New. > * gcc.target/aarch64/sync-op-full.c: New. > * gcc.target/aarch64/sync-op-full.x: New. > * gcc.target/aarch64/sync-op-release.c: New. > * gcc.target/aarch64/sync-op-release.x: New. > > From 704058e9acd56043c3b8549c3bbe14acf1c370e3 Mon Sep 17 00:00:00 2001 > From: mwahab <mwahab@138bc75d-0d04-0410-961f-82ee72b054a4> > Date: Mon, 1 Jun 2015 15:24:37 +0000 > Subject: [PATCH 4/4] [Aarch64][5.1] Add tests for __sync_builtins. > > PR target/65697 > * gcc.target/aarch64/sync-comp-swap.c: New. > * gcc.target/aarch64/sync-comp-swap.x: New. > * gcc.target/aarch64/sync-op-acquire.c: New. > * gcc.target/aarch64/sync-op-acquire.x: New. > * gcc.target/aarch64/sync-op-full.c: New. > * gcc.target/aarch64/sync-op-full.x: New. > * gcc.target/aarch64/sync-op-release.c: New. > * gcc.target/aarch64/sync-op-release.x: New. > > git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@223986 > 138bc75d-0d04-0410-961f-82ee72b054a4 > > Conflicts: > gcc/testsuite/ChangeLog > > Change-Id: I1cc83df41532588a7d91c5b021838392e5547e85 > --- > gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c | 8 +++ > gcc/testsuite/gcc.target/aarch64/sync-comp-swap.x | 13 ++++ > gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c | 8 +++ > gcc/testsuite/gcc.target/aarch64/sync-op-acquire.x | 7 +++ > gcc/testsuite/gcc.target/aarch64/sync-op-full.c | 8 +++ > gcc/testsuite/gcc.target/aarch64/sync-op-full.x | 73 > ++++++++++++++++++++++ > gcc/testsuite/gcc.target/aarch64/sync-op-release.c | 6 ++ > gcc/testsuite/gcc.target/aarch64/sync-op-release.x | 7 +++ > 8 files changed, 130 insertions(+) > create mode 100644 gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/sync-comp-swap.x > create mode 100644 gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/sync-op-acquire.x > create mode 100644 gcc/testsuite/gcc.target/aarch64/sync-op-full.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/sync-op-full.x > create mode 100644 gcc/testsuite/gcc.target/aarch64/sync-op-release.c > create mode 100644 gcc/testsuite/gcc.target/aarch64/sync-op-release.x > > diff --git a/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c > b/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c > new file mode 100644 > index 0000000..126b997 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.c > @@ -0,0 +1,8 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2 -fno-ipa-icf" } */ > + > +#include "sync-comp-swap.x" > + > +/* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 2 > } } */ > +/* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, > \\\[x\[0-9\]+\\\]" 2 } } */ > +/* { dg-final { scan-assembler-times "dmb\tish" 2 } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.x > b/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.x > new file mode 100644 > index 0000000..eda52e40 > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/sync-comp-swap.x > @@ -0,0 +1,13 @@ > +int v = 0; > + > +int > +sync_bool_compare_swap (int a, int b) > +{ > + return __sync_bool_compare_and_swap (&v, &a, &b); > +} > + > +int > +sync_val_compare_swap (int a, int b) > +{ > + return __sync_val_compare_and_swap (&v, &a, &b); > +} > diff --git a/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c > b/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c > new file mode 100644 > index 0000000..2639f9f > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.c > @@ -0,0 +1,8 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2" } */ > + > +#include "sync-op-acquire.x" > + > +/* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 1 > } } */ > +/* { dg-final { scan-assembler-times "stxr\tw\[0-9\]+, w\[0-9\]+, > \\\[x\[0-9\]+\\\]" 1 } } */ > +/* { dg-final { scan-assembler-times "dmb\tish" 1 } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.x > b/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.x > new file mode 100644 > index 0000000..4c4548c > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/sync-op-acquire.x > @@ -0,0 +1,7 @@ > +int v; > + > +int > +sync_lock_test_and_set (int a) > +{ > + return __sync_lock_test_and_set (&v, a); > +} > diff --git a/gcc/testsuite/gcc.target/aarch64/sync-op-full.c > b/gcc/testsuite/gcc.target/aarch64/sync-op-full.c > new file mode 100644 > index 0000000..10fc8fc > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/sync-op-full.c > @@ -0,0 +1,8 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2" } */ > + > +#include "sync-op-full.x" > + > +/* { dg-final { scan-assembler-times "ldxr\tw\[0-9\]+, \\\[x\[0-9\]+\\\]" 12 > } } */ > +/* { dg-final { scan-assembler-times "stlxr\tw\[0-9\]+, w\[0-9\]+, > \\\[x\[0-9\]+\\\]" 12 } } */ > +/* { dg-final { scan-assembler-times "dmb\tish" 12 } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/sync-op-full.x > b/gcc/testsuite/gcc.target/aarch64/sync-op-full.x > new file mode 100644 > index 0000000..c24223d > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/sync-op-full.x > @@ -0,0 +1,73 @@ > +int v = 0; > + > +int > +sync_fetch_and_add (int a) > +{ > + return __sync_fetch_and_add (&v, a); > +} > + > +int > +sync_fetch_and_sub (int a) > +{ > + return __sync_fetch_and_sub (&v, a); > +} > + > +int > +sync_fetch_and_and (int a) > +{ > + return __sync_fetch_and_and (&v, a); > +} > + > +int > +sync_fetch_and_nand (int a) > +{ > + return __sync_fetch_and_nand (&v, a); > +} > + > +int > +sync_fetch_and_xor (int a) > +{ > + return __sync_fetch_and_xor (&v, a); > +} > + > +int > +sync_fetch_and_or (int a) > +{ > + return __sync_fetch_and_or (&v, a); > +} > + > +int > +sync_add_and_fetch (int a) > +{ > + return __sync_add_and_fetch (&v, a); > +} > + > +int > +sync_sub_and_fetch (int a) > +{ > + return __sync_sub_and_fetch (&v, a); > +} > + > +int > +sync_and_and_fetch (int a) > +{ > + return __sync_and_and_fetch (&v, a); > +} > + > +int > +sync_nand_and_fetch (int a) > +{ > + return __sync_nand_and_fetch (&v, a); > +} > + > +int > +sync_xor_and_fetch (int a) > +{ > + return __sync_xor_and_fetch (&v, a); > +} > + > +int > +sync_or_and_fetch (int a) > +{ > + return __sync_or_and_fetch (&v, a); > +} > diff --git a/gcc/testsuite/gcc.target/aarch64/sync-op-release.c > b/gcc/testsuite/gcc.target/aarch64/sync-op-release.c > new file mode 100644 > index 0000000..d25b46f > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/sync-op-release.c > @@ -0,0 +1,6 @@ > +/* { dg-do compile } */ > +/* { dg-options "-O2" } */ > + > +#include "sync-op-release.x" > + > +/* { dg-final { scan-assembler-times "stlr" 1 } } */ > diff --git a/gcc/testsuite/gcc.target/aarch64/sync-op-release.x > b/gcc/testsuite/gcc.target/aarch64/sync-op-release.x > new file mode 100644 > index 0000000..704bcff > --- /dev/null > +++ b/gcc/testsuite/gcc.target/aarch64/sync-op-release.x > @@ -0,0 +1,7 @@ > +int v; > + > +void > +sync_lock_release (void) > +{ > + __sync_lock_release (&v); > +} > -- > 1.9.1 >