> Fact is that GCC knows that memory is not properly aligned. So in the impossibly rare case that gcc is *wrong*, how is the programmer supposed to tell gcc that? I mean, gcc 4.4 has been doing what the programmer wanted, and zillions of ARM devices have been happily working, and now you tell me they should have been segfaulting for the last N years. Surely there's a chance that the ARM developers know what they're talking about, and have been desperately trying to convince gcc to stop trying to second-guess them?
I mean, what else should the user expect when they cast a random value to a "volatile uint32_t *" and derefence it? I would have expected gcc to preserve the load *exactly* as the user specified it, not convert that one load into FOUR loads.
