The following patch is for
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61578
The patch was bootstrapped and tested on x86 and x86-64.
Committed as rev. 227382.
2015-09-01 Vladimir Makarov <[email protected]>
PR target/61578
* lra-lives.c (process_bb_lives): Process move pseudos with the
same value for copies and preferences
* lra-constraints.c (match_reload): Create match reload pseudo
with the same value from single dying input pseudo.
Index: lra-constraints.c
===================================================================
--- lra-constraints.c (revision 227381)
+++ lra-constraints.c (working copy)
@@ -928,10 +928,12 @@ match_reload (signed char out, signed ch
they live in the same place. When we create a pseudo we
assign value of original pseudo (if any) from which we
created the new pseudo. If we create the pseudo from the
- input pseudo, the new pseudo will no conflict with the input
- pseudo which is wrong when the input pseudo lives after the
- insn and as the new pseudo value is changed by the insn
- output. Therefore we create the new pseudo from the output.
+ input pseudo, the new pseudo will have no conflict with the
+ input pseudo which is wrong when the input pseudo lives after
+ the insn and as the new pseudo value is changed by the insn
+ output. Therefore we create the new pseudo from the output
+ except the case when we have single matched dying input
+ pseudo.
We cannot reuse the current output register because we might
have a situation like "a <- a op b", where the constraints
@@ -940,8 +942,12 @@ match_reload (signed char out, signed ch
so that it doesn't clobber the current value of "a". */
new_in_reg = new_out_reg
- = lra_create_new_reg_with_unique_value (outmode, out_rtx,
- goal_class, "");
+ = (ins[1] < 0 && REG_P (in_rtx)
+ && (int) REGNO (in_rtx) < lra_new_regno_start
+ && find_regno_note (curr_insn, REG_DEAD, REGNO (in_rtx))
+ ? lra_create_new_reg (inmode, in_rtx, goal_class, "")
+ : lra_create_new_reg_with_unique_value (outmode, out_rtx,
+ goal_class, ""));
}
/* In operand can be got from transformations before processing insn
constraints. One example of such transformations is subreg
Index: lra-lives.c
===================================================================
--- lra-lives.c (revision 227381)
+++ lra-lives.c (working copy)
@@ -726,28 +726,33 @@ process_bb_lives (basic_block bb, int &c
lra_hard_reg_usage[reg->regno] += freq;
call_p = CALL_P (curr_insn);
+ src_regno = (set != NULL_RTX && REG_P (SET_SRC (set))
+ ? REGNO (SET_SRC (set)) : -1);
+ dst_regno = (set != NULL_RTX && REG_P (SET_DEST (set))
+ ? REGNO (SET_DEST (set)) : -1);
if (complete_info_p
- && set != NULL_RTX
- && REG_P (SET_DEST (set)) && REG_P (SET_SRC (set))
+ && src_regno >= 0 && dst_regno >= 0
/* Check that source regno does not conflict with
destination regno to exclude most impossible
preferences. */
- && ((((src_regno = REGNO (SET_SRC (set))) >= FIRST_PSEUDO_REGISTER
- && ! sparseset_bit_p (pseudos_live, src_regno))
+ && (((src_regno >= FIRST_PSEUDO_REGISTER
+ && (! sparseset_bit_p (pseudos_live, src_regno)
+ || (dst_regno >= FIRST_PSEUDO_REGISTER
+ && lra_reg_val_equal_p (src_regno,
+ lra_reg_info[dst_regno].val,
+ lra_reg_info[dst_regno].offset))))
|| (src_regno < FIRST_PSEUDO_REGISTER
&& ! TEST_HARD_REG_BIT (hard_regs_live, src_regno)))
/* It might be 'inheritance pseudo <- reload pseudo'. */
|| (src_regno >= lra_constraint_new_regno_start
- && ((int) REGNO (SET_DEST (set))
- >= lra_constraint_new_regno_start)
+ && dst_regno >= lra_constraint_new_regno_start
/* Remember to skip special cases where src/dest regnos are
the same, e.g. insn SET pattern has matching constraints
like =r,0. */
- && src_regno != (int) REGNO (SET_DEST (set)))))
+ && src_regno != dst_regno)))
{
int hard_regno = -1, regno = -1;
- dst_regno = REGNO (SET_DEST (set));
if (dst_regno >= lra_constraint_new_regno_start
&& src_regno >= lra_constraint_new_regno_start)
{
