More left shifts of negative signed values to fix in the SH port. I'm
not sure how these were missed last week or if they were introduced
between the point when I tested last week and yesterday. Regardless,
they're fixed in the obvious way.
Tested by building all the sh targets form config-all.mk.
Installed on the trunk.
Jeff
commit d1349379450b8e11dcc7adfe678028b674a63cf1
Author: Jeff Law <l...@tor.usersys.redhat.com>
Date: Mon Sep 28 19:25:20 2015 -0400
[PATCH] Fix undefined behaviour in SH port
* config/sh/sh.c (gen_shl_and): Fix undefined left shift
behaviour.
(gen_shl_sext): Likewise.
* config/sh/sh.md (divsi3): Likewise.
(imm->ext_dest_operand splitter): Likewise.
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index cce1ba5..22c09b7 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2015-09-29 Jeff Law <l...@redhat.com>
+
+ * config/sh/sh.c (gen_shl_and): Fix undefined left shift
+ behaviour.
+ (gen_shl_sext): Likewise.
+ * config/sh/sh.md (divsi3): Likewise.
+ (imm->ext_dest_operand splitter): Likewise.
+
2015-09-29 Evandro Menezes <e.mene...@samsung.com>
* config/arm/types.md (neon_ldp, neon_ldp_q, neon_stp, neon_stp_q):
diff --git a/gcc/config/sh/sh.c b/gcc/config/sh/sh.c
index 16fb575..904201b 100644
--- a/gcc/config/sh/sh.c
+++ b/gcc/config/sh/sh.c
@@ -4342,7 +4342,7 @@ gen_shl_and (rtx dest, rtx left_rtx, rtx mask_rtx, rtx
source)
that don't matter. This way, we might be able to get a shorter
signed constant. */
if (mask & ((HOST_WIDE_INT) 1 << (31 - total_shift)))
- mask |= (HOST_WIDE_INT) ~0 << (31 - total_shift);
+ mask |= (HOST_WIDE_INT) ((HOST_WIDE_INT_M1U) << (31 - total_shift));
case 2:
/* Don't expand fine-grained when combining, because that will
make the pattern fail. */
@@ -4626,7 +4626,7 @@ gen_shl_sext (rtx dest, rtx left_rtx, rtx size_rtx, rtx
source)
}
emit_insn (gen_andsi3 (dest, source, GEN_INT ((1 << insize) - 1)));
emit_insn (gen_xorsi3 (dest, dest, GEN_INT (1 << (insize - 1))));
- emit_insn (gen_addsi3 (dest, dest, GEN_INT (-1 << (insize - 1))));
+ emit_insn (gen_addsi3 (dest, dest, GEN_INT (HOST_WIDE_INT_M1U << (insize
- 1))));
operands[0] = dest;
operands[2] = kind == 7 ? GEN_INT (left + 1) : left_rtx;
gen_shifty_op (ASHIFT, operands);
diff --git a/gcc/config/sh/sh.md b/gcc/config/sh/sh.md
index 8a388bc..d758e3b 100644
--- a/gcc/config/sh/sh.md
+++ b/gcc/config/sh/sh.md
@@ -3052,7 +3052,7 @@
tab_base = force_reg (DImode, tab_base);
}
if (TARGET_DIVIDE_INV20U)
- i2p27 = force_reg (DImode, GEN_INT (-2 << 27));
+ i2p27 = force_reg (DImode, GEN_INT ((unsigned HOST_WIDE_INT)-2 << 27));
else
i2p27 = GEN_INT (0);
if (TARGET_DIVIDE_INV20U || TARGET_DIVIDE_INV20L)
@@ -7875,7 +7875,7 @@ label:
break;
}
/* Try movi / mshflo.l w/ r63. */
- val2 = val + ((HOST_WIDE_INT) -1 << 32);
+ val2 = val + ((HOST_WIDE_INT) (HOST_WIDE_INT_M1U << 32));
if ((HOST_WIDE_INT) val2 < 0 && CONST_OK_FOR_I16 (val2))
{
operands[1] = gen_mshflo_l_di (operands[0], operands[0],
