Re: [PATCH, i386] Add missing entries to cpuinfo.

[Kirill Yukhin]

Hi Uroš,
On 06 Oct 17:15, Uros Bizjak wrote:
> On Tue, Oct 6, 2015 at 3:36 PM, Kirill Yukhin <kirill.yuk...@gmail.com> wrote:
> > Hello,
> > Patch in the bottom adds missing options to libgcc/config/i386/cpuinfo.c
> > It also updates documentation.
> > As far as number of entries exceeded 32, I've extended
> > type of features array to INT64 (most suspicious part of the patch).
> >
> > Bootstrapped and regtested. `make pdf' seems to be working properly.
> >
> > Comments?
> 
> Er, this is on purpose. Multiversioning is intended to depend on ISA
> extensions such as SSE, AVX, AES to some degree, and similar
> extensions that do make a difference when used in compilation. This
> was discussed some years ago, but I can't find the URL of the
> discussion.
> 
> So, from the list below, I'd take only SHA. Plus fixes/additions in
> the documentation and testsuite, of course.
Okay, got it. Updated patch in the bottom.

Bootstrapped and regtested. Is it ok for trunk?

commit dd26e736491473793bbb2da3d5922835dc3ad181
Author: Kirill Yukhin <kirill.yuk...@intel.com>
Date:   Wed Oct 7 08:42:10 2015 +0300

    Add SHA to cpuinfo.

diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index d59b59b..44060cf 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -36587,6 +36587,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
     F_AVX512PF,
     F_AVX512VBMI,
     F_AVX512IFMA,
+    F_SHA,
     F_MAX
   };
 
@@ -36697,6 +36698,7 @@ fold_builtin_cpu (tree fndecl, tree *args)
       {"avx512pf",F_AVX512PF},
       {"avx512vbmi",F_AVX512VBMI},
       {"avx512ifma",F_AVX512IFMA},
+      {"sha",     F_SHA},
     };
 
   tree __processor_model_type = build_processor_model_struct ();
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 2db7bb2..869a491 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -16894,6 +16894,21 @@ Intel Core i7 Westmere CPU.
 @item sandybridge
 Intel Core i7 Sandy Bridge CPU.
 
+@item ivybridge
+Intel Core i7 Ivy Bridge CPU.
+
+@item haswell
+Intel Core i7 Haswell CPU.
+
+@item broadwell
+Intel Core i7 Broadwell CPU.
+
+@item skylake
+Intel Core i7 Skylake CPU.
+
+@item skylake-avx512
+Intel Core i7 Skylake CPU with AVX-512 extensions.
+
 @item amd
 AMD CPU.
 
@@ -16974,6 +16989,8 @@ AVX instructions.
 AVX2 instructions.
 @item avx512f
 AVX512F instructions.
+@item sha
+SHA instructions.
 @end table
 
 Here is an example:
diff --git a/gcc/testsuite/gcc.target/i386/builtin_target.c 
b/gcc/testsuite/gcc.target/i386/builtin_target.c
index dd31108..1da0e96 100644
--- a/gcc/testsuite/gcc.target/i386/builtin_target.c
+++ b/gcc/testsuite/gcc.target/i386/builtin_target.c
@@ -213,6 +213,8 @@ check_features (unsigned int ecx, unsigned int edx,
        assert (__builtin_cpu_supports ("avx512ifma"));
       if (ecx & bit_AVX512VBMI)
        assert (__builtin_cpu_supports ("avx512vbmi"));
+      if (ebx & bit_SHA)
+       assert (__builtin_cpu_supports ("sha"));
     }
 }
 
diff --git a/libgcc/config/i386/cpuinfo.c b/libgcc/config/i386/cpuinfo.c
index 0cbbc85..62cdbe8 100644
--- a/libgcc/config/i386/cpuinfo.c
+++ b/libgcc/config/i386/cpuinfo.c
@@ -113,7 +113,8 @@ enum processor_features
   FEATURE_AVX512ER,
   FEATURE_AVX512PF,
   FEATURE_AVX512VBMI,
-  FEATURE_AVX512IFMA
+  FEATURE_AVX512IFMA,
+  FEATURE_SHA
 };
 
 struct __processor_model
@@ -348,6 +349,8 @@ get_available_features (unsigned int ecx, unsigned int edx,
        features |= (1 << FEATURE_AVX512IFMA);
       if (ecx & bit_AVX512VBMI)
        features |= (1 << FEATURE_AVX512VBMI);
+      if (ebx & bit_SHA)
+       features |= (1 << FEATURE_SHA);
     }
 
   unsigned int ext_level;