On 20 October 2015 at 00:40, Evandro Menezes <e.mene...@samsung.com> wrote: > In the existing targets, it seems that it's always faster to zero up a DF > register with "movi %d0, #0" instead of "fmov %d0, xzr". > > This patch modifies the respective pattern.
Hi Evandro, This patch changes the generic, u architecture independent instruction selection. The ARM ARM (C3.5.3) makes a specific recommendation about the choice of instruction in this situation and the current implementation in GCC follows that recommendation. Wilco has also picked up on this issue he has the same patch internal to ARM along with an ongoing discussion with ARM architecture folk regarding this recommendation. I'm reluctant to take this patch right now on the basis that it runs contrary to ARM ARM recommendation pending the conclusion of Wilco's discussion with ARM architecture folk. Cheers /Marcus
