From: Charles Baylis <charles.bay...@linaro.org>
Previous discussion: https://gcc.gnu.org/ml/gcc-patches/2015-10/msg00657.html
This is a minor update to the previous patch set, fixing one coding style issue
in the first patch, and adding a fourth patch for which there are two options,
described below.
[ARM] PR63870 Add qualifiers for NEON builtins
[ARM] PR63870 Mark lane indices of vldN/vstN with appropriate
qualifier
[ARM] PR63870 Add test cases
These two patches are alternate options. Alan suggested removing the error
checks at assembly time, since the user-supplied lane number is always be
checked earlier. I thought it might be better to catch this case as an internal
error, to guard against future bugs.. If we don't use the internal error, then
the assembler will catch use of invalid lane numbers. Not sure which is
prefered, so both options are presented. Either one can be applied:
[ARM] PR63870 Use internal_error() for invalid lane numbers
[ARM] PR63870 Remove error for invalid lane numbers
Passes make check for arm-unknown-linux-gnueabihf and
armeb-unknown-linux-gnueabihf with no regressions. As mentioned in the last
thread, the new *_f16 tests fail on armeb-* due to unrelated problems with
half float moves.
OK for trunk? I prefer patch 4a, but will commit 4b if that is prefered.
gcc/config/arm/arm-builtins.c | 52 +++++++-----
gcc/config/arm/arm.c | 1 +
gcc/config/arm/arm.h | 3 +
gcc/config/arm/neon.md | 97 ++++++++--------------
.../advsimd-intrinsics/vld2_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld2q_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld3q_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vld4q_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst2q_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst3q_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4_lane_u8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_f16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_f32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_f64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_p8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_s16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_s32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_s64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_s8_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_u16_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_u32_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_u64_indices_1.c | 5 +-
.../advsimd-intrinsics/vst4q_lane_u8_indices_1.c | 5 +-
148 files changed, 358 insertions(+), 515 deletions(-)
--
1.9.1
