On Tue, Nov 10, 2015 at 10:04:30PM +0100, Bernd Schmidt wrote:
> On 11/10/2015 06:44 PM, Segher Boessenkool wrote:
>
> >Yes I know. All the rest of the code around is it like this though.
> >Do you want this written in a saner way?
>
> I won't object to leaving it as-is for now, but in the future it would
> be good to keep this in mind.
With the trunc_int_for_mode it ended up hugging the righthand margin,
so I did clean it up after all. Please see attached (committed).
Segher
diff --git a/gcc/simplify-rtx.c b/gcc/simplify-rtx.c
index 17568ba..c4fc42a 100644
--- a/gcc/simplify-rtx.c
+++ b/gcc/simplify-rtx.c
@@ -714,6 +714,34 @@ simplify_truncation (machine_mode mode, rtx op,
return simplify_gen_binary (ASHIFT, mode,
XEXP (XEXP (op, 0), 0), XEXP (op, 1));
+ /* Likewise (truncate:QI (and:SI (lshiftrt:SI (x:SI) C) C2)) into
+ (and:QI (lshiftrt:QI (truncate:QI (x:SI)) C) C2) for suitable C
+ and C2. */
+ if (GET_CODE (op) == AND
+ && (GET_CODE (XEXP (op, 0)) == LSHIFTRT
+ || GET_CODE (XEXP (op, 0)) == ASHIFTRT)
+ && CONST_INT_P (XEXP (XEXP (op, 0), 1))
+ && CONST_INT_P (XEXP (op, 1)))
+ {
+ rtx op0 = (XEXP (XEXP (op, 0), 0));
+ rtx shift_op = XEXP (XEXP (op, 0), 1);
+ rtx mask_op = XEXP (op, 1);
+ unsigned HOST_WIDE_INT shift = UINTVAL (shift_op);
+ unsigned HOST_WIDE_INT mask = UINTVAL (mask_op);
+
+ if (shift < precision
+ /* If doing this transform works for an X with all bits set,
+ it works for any X. */
+ && ((GET_MODE_MASK (mode) >> shift) & mask)
+ == ((GET_MODE_MASK (op_mode) >> shift) & mask)
+ && (op0 = simplify_gen_unary (TRUNCATE, mode, op0, op_mode))
+ && (op0 = simplify_gen_binary (LSHIFTRT, mode, op0, shift_op)))
+ {
+ mask_op = GEN_INT (trunc_int_for_mode (mask, mode));
+ return simplify_gen_binary (AND, mode, op0, mask_op);
+ }
+ }
+
/* Recognize a word extraction from a multi-word subreg. */
if ((GET_CODE (op) == LSHIFTRT
|| GET_CODE (op) == ASHIFTRT)
--
1.9.3
