On 3 August 2011 08:48, Jiangning Liu <jiangning....@arm.com> wrote:
> This patch is to generate more conditional compare instructions in Thumb2
> state. Given an example like below,
>
> int f(int i, int j)
> {
> if ( (i == '+') || (j == '-') ) {
> return i;
> } else {
> return j;
> }
> }
>
> Without the patch, compiler generates the following codes,
>
> sub r2, r0, #43
> rsbs r3, r2, #0
> adc r3, r3, r2
> cmp r1, #45
> it eq
> orreq r3, r3, #1
> cmp r3, #0
> it eq
> moveq r0, r1
> bx lr
>
> With the patch, compiler can generate conditional jump like below,
>
> cmp r0, #43
> it ne
> cmpne r1, #45
> it ne
> movne r0, r1
> bx lr
Nice improvement but there could be a single it block to handle both
and thus you
could make this even better with
cmp r0, #43
itt ne
cmpne r1 ,#45
movne r0, r1
The way to do this would be to try and split this post-reload
unfortunately into the cmp instruction and the conditional compare
with the appropriate instruction length - Then the backend has a
chance of merging some of this into a single instruction.
Unfortunately that won't be very straight-forward but that's a
direction we probably ought to proceed with in this case.
In a number of places:
> + if (arm_arch_thumb2)
Ah instead of this please use if (TARGET_THUMB2) - arm_arch_thumb2 is
true based on the architecture levels and not necessarily if the user
wants to generate Thumb code. I don't want an unnecessary IT
instruction being emitted in the ASM block in ARM state for v7-a and
above.
> Tested against arm-none-eabi target and no regression found.
Presumably for ARM and Thumb2 state ?
cheers
Ramana
