On Fri, Oct 23, 2015 at 01:30:46PM +0100, Matthew Wahab wrote: > The ARMv8.1 architecture extension adds two Adv.SIMD instructions, > sqrdmlah and sqrdmlsh. This patch adds the NEON intrinsics vqrdmlah_lane > and vqrdmlsh_lane for these instructions. The new intrinsics are of the > form vqrdml{as}h[q]_lane_<type>. > > Tested the series for aarch64-none-linux-gnu with native bootstrap and > make check on an ARMv8 architecture. Also tested aarch64-none-elf with > cross-compiled check-gcc on an ARMv8.1 emulator. > > Ok for trunk? > Matthew > > gcc/ > 2015-10-23 Matthew Wahab <matthew.wa...@arm.com> > > * gcc/config/aarch64/arm_neon.h > (vqrdmlah_laneq_s16, vqrdmlah_laneq_s32): New. > (vqrdmlahq_laneq_s16, vqrdmlahq_laneq_s32): New. > (vqrdmlsh_laneq_s16, vqrdmlsh_laneq_s32): New. > (vqrdmlshq_laneq_s16, vqrdmlshq_laneq_s32): New. > (vqrdmlah_lane_s16, vqrdmlah_lane_s32): New. > (vqrdmlahq_lane_s16, vqrdmlahq_lane_s32): New. > (vqrdmlahh_s16, vqrdmlahh_lane_s16, vqrdmlahh_laneq_s16): New. > (vqrdmlahs_s32, vqrdmlahs_lane_s32, vqrdmlahs_laneq_s32): New. > (vqrdmlsh_lane_s16, vqrdmlsh_lane_s32): New. > (vqrdmlshq_lane_s16, vqrdmlshq_lane_s32): New. > (vqrdmlshh_s16, vqrdmlshh_lane_s16, vqrdmlshh_laneq_s16): New. > (vqrdmlshs_s32, vqrdmlshs_lane_s32, vqrdmlshs_laneq_s32): New. > > gcc/testsuite > 2015-10-23 Matthew Wahab <matthew.wa...@arm.com> > > * gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh_lane.inc: New file, > support code for vqrdml{as}h_lane tests. > * gcc.target/aarch64/advsimd-intrinsics/vqrdmlah_lane.c: New. > * gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh_lane.c: New. >
> From a2399818dba85ff2801a28bad77ef51697990da7 Mon Sep 17 00:00:00 2001 > From: Matthew Wahab <matthew.wa...@arm.com> > Date: Thu, 27 Aug 2015 14:17:26 +0100 > Subject: [PATCH 7/7] Add neon intrinsics: vqrdmlah_lane, vqrdmlsh_lane. > > Change-Id: I6d7a372e0a5b83ef0846ab62abbe9b24ada69fc4 > --- > gcc/config/aarch64/arm_neon.h | 182 > +++++++++++++++++++++ > .../aarch64/advsimd-intrinsics/vqrdmlXh_lane.inc | 154 +++++++++++++++++ > .../aarch64/advsimd-intrinsics/vqrdmlah_lane.c | 57 +++++++ > .../aarch64/advsimd-intrinsics/vqrdmlsh_lane.c | 61 +++++++ > 4 files changed, 454 insertions(+) > create mode 100644 > gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlXh_lane.inc > create mode 100644 > gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlah_lane.c > create mode 100644 > gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vqrdmlsh_lane.c > > diff --git a/gcc/config/aarch64/arm_neon.h b/gcc/config/aarch64/arm_neon.h > index 9e73809..9b68e4a 100644 > --- a/gcc/config/aarch64/arm_neon.h > +++ b/gcc/config/aarch64/arm_neon.h > @@ -10675,6 +10675,59 @@ vqrdmulhq_laneq_s32 (int32x4_t __a, int32x4_t __b, > const int __c) > return __builtin_aarch64_sqrdmulh_laneqv4si (__a, __b, __c); > } > > +#pragma GCC push_options > +#pragma GCC target ("arch=armv8.1-a") Rather than strict alphabetical order, can we group everything which is under one set of extensions together, to save on the push_options/pop_options pairs. This patch is OK with that change. Thanks, James