Ping https://gcc.gnu.org/ml/gcc-patches/2016-01/msg02309.html
Thanks, Kyrill On 29/01/16 14:27, Kyrill Tkachov wrote:
Hi all, Similar to aarch64, the arm port also suffers from PR target/69161 when combine tries to propagate a CCmode comparison into a vec_duplicate, creating invalid RTL that ICEs. Please refer to the PR and the aarch64 fix for more info. The fix for arm is very similar. We define a new predicate identical to arm_comparison_operator but make it not special so that it gets the normal mode checks. This prevents combine from matching an intermediate CCmode cstore (where it's doing an SImode SET of a CCmode source) which it then tries to propagate into a V4SImode vec_duplicate. The offending patterns are the cstore patterns, so this patch updates them to use the new predicate with mode checks. Both arm and thumb patterns are updated. There was no codegen difference observed on SPEC2006 for arm. Bootstrapped and tested on arm-none-linux-gnueabihf. Ok for trunk? Thanks, Kyrill 2016-01-29 Kyrylo Tkachov <kyrylo.tkac...@arm.com> PR target/69161 * config/arm/predicates.md (arm_comparison_operator_mode): New predicate. * config/arm/arm.md (*mov_scc): Use arm_comparison_operator_mode instead of arm_comparison_operator. (*mov_negscc): Likewise. (*mov_notscc): Likewise. * config/arm/thumb2.md (*thumb2_mov_scc): Likewise. (*thumb2_mov_negscc): Likewise. (*thumb2_mov_negscc_strict_it): Likewise. (*thumb2_mov_notscc): Likewise. (*thumb2_mov_notscc_strict_it): Likewise.