Andreas Krebbel wrote:
> * config/s390/predicates.md (const_int_6bitset_operand): New
> predicates.
> * config/s390/s390.md: Include subst.md.
> ("rotl<mode>3"): New expander.
> ("rotl<mode>3", "*rotl<mode>3_and"): Merge insn definitions into
> ...
> ("*rotl<mode>3<addr_style_op><masked_op>"): New insn definition.
> * config/s390/subst.md: New file.
This already looks much nicer (and shorter) :-)
In fact, I'm now wondering whether it couldn't be even shorter. Would it
be possible to use instead of:
(define_insn "*rotl<mode>3<addr_style_op><masked_op>"
[(set (match_operand:GPR 0 "register_operand" "=d,d")
(rotate:GPR (match_operand:GPR 1 "register_operand" "d,d")
(match_operand:SI 2 "nonmemory_operand" "a,n")))]
"TARGET_CPU_ZARCH"
"@
rll<g>\t%0,%1,<addr_style_op_op3>(%2)
rll<g>\t%0,%1,%Y2"
[(set_attr "op_type" "RSE")
(set_attr "atype" "reg")
(set_attr "enabled" "*,<addr_style_op_enabled>")
(set_attr "z10prop" "z10_super_E1")])
simply something like:
(define_insn "*rotl<mode>3<addr_style_op><masked_op>"
[(set (match_operand:GPR 0 "register_operand" "=d")
(rotate:GPR (match_operand:GPR 1 "register_operand" "d")
(match_operand:SI 2 "nonmemory_operand" "an")))]
"TARGET_CPU_ZARCH"
"rll<g>\t%0,%1,<addr_style_op_ops>
[(set_attr "op_type" "RSE")
(set_attr "atype" "reg")
(set_attr "z10prop" "z10_super_E1")])
where addr_style_op_ops is defined like:
(define_subst_attr "addr_style_op_ops" "addr_style_op_subst" "%Y2" "%Y3(%2)")
and we don't need addr_style_op_enabled any more? %Y would continue
to emit both simple constants and register operands (and full address
operands e.g. for setmem) as before.
> +(define_subst "masked_op_subst"
> + [(set (match_operand:DSI 0 "" "")
> + (SUBST:DSI (match_operand:DSI 1 "" "")
> + (match_operand:SI 2 "" "")))]
> + ""
> + [(set (match_dup 0)
> + (SUBST:DSI (match_dup 1)
> + (and:SI (match_dup 2)
> + (match_operand:SI 3 "const_int_6bitset_operand"
> ""))))])
Do we need a constraint letter here?
Bye,
Ulrich
--
Dr. Ulrich Weigand
GNU/Linux compilers and toolchain
ulrich.weig...@de.ibm.com
