On 03/04/2016 03:54 PM, Alan Modra wrote:
This is a fix for two testcases that show reload replacing pseudos
that don't get hard regs, with their equivalent mem initialization,
but failing to address the mem properly. The short story is that ira
analysis creates reg equivalence info for use by reload, based on
register lifetimes that are invalidated by ira itself deleting dead
insns.
My first attempt to fix this problem was to just run
delete_trivially_dead_insns early in ira. That's enough to cure the
testcase failures. However, ira also deletes unreachable blocks (that
are only recognized as such after ira reg equivalence analysis), and
I figure it is possible that deleting those insns may similarly affect
register lifetimes.
So what this patch does is revalidate the reg equivalences after insns
have been deleted, recreating them as if insns had been deleted before
any analysis occurred. The patch has been bootstrapped and regression
tested on powerpc64le-linux. Do we go with this approach, or just run
simple delete_trivially_dead_insns early? Or something else?
I've managed to reproduce this, and I think your analysis of the problem
is correct. So the patch is probably ok from the point of you of "will
it work". I can probably be convinced to approve it as-is, but I wonder
if you'd be prepared to try something else first.
This whole area in IRA is turning into spaghetti a little bit. I would
prefer that we schedule a new small optimization pass beforehand (either
as a real pass or just a function call) that does only the
label-substituting trick from update_equiv_regs, then removes dead code
as necessary. When we then get to IRA and setting up equiv regs, we
should no longer get to a point where we need to reverify equivalences
or update regstat.
Bernd
