This series tidies some of the early ira code, in the process making a tiny improvement to register pressure. Patches 1 to 3 are fairly simple tidies, with zero impact on generated code. Patch 4 also is mainly a tidy, but could see some extra REG_EQUIV notes added by add_store_equivs. In practice I didn't see any differences in gcc/*.o on both x86_64 and powerpc64le (except ira.o of course) after this patch.
Patch 5 is also just a tidy. Patch 6 shows quite a number of changes in gcc/*.o code gen. All of those I looked at proved to be due to lack of REG_DEAD notes on insns where the reg was in fact dead. (I haven't looked into why we don't get the note, past seeing that the df_lr out info says the reg is live, which seems wrong for bbs where this happens.) Patch 7 is really the reason I started writing these patches. I'd hoped that more combines and/or moves would reduce register pressure. x86_64 did make the occasional extra combine/move over a function call, but powerpc64le didn't show any changes over patch 6 for gcc/*.o and gcc/*/*.o. Bootstrapped and regression tested x86_64-linux and powerpc64le-linux. OK when stage1 opens? Alan Modra (7): ira.c tidies: move pdx_subregs into reg_equiv ira.c tidies: split update_reg_equivs ira.c tidies: validate_equiv_mem_from_store ira.c combine_and_move_insns, and ordering of functions ira.c use DF luid rather than tracking insn ordering ira.c use DF infrastructure for combine_and_move_insns ira.c validate_equiv_mem gcc/ira.c | 521 ++++++++++++++++++++++++++++---------------------------------- 1 file changed, 233 insertions(+), 288 deletions(-) -- Alan Modra Australia Development Lab, IBM
