On 03/21/2016 02:37 AM, Alan Modra wrote:
This series tidies some of the early ira code, in the process making a tiny improvement to register pressure. Patches 1 to 3 are fairly simple tidies, with zero impact on generated code. Patch 4 also is mainly a tidy, but could see some extra REG_EQUIV notes added by add_store_equivs. In practice I didn't see any differences in gcc/*.o on both x86_64 and powerpc64le (except ira.o of course) after this patch.
These are ok when gcc-7 stage1 opens.
Patch 5 is also just a tidy.
This one I'm not sure I like. I see the benefit of using less memory, but it feels less robust to rely on "more or less valid" data, especially considering someone may add another optimization at some point without considering its effect on luids.
The other two I still need to look at a bit. Bernd
