On 31 Mar 13:47, Uros Bizjak wrote: > On Thu, Mar 31, 2016 at 1:31 PM, Jakub Jelinek <ja...@redhat.com> wrote: > > On Thu, Mar 31, 2016 at 02:25:41PM +0300, Ilya Enkovich wrote: > >> This patch adds support for undefined register copies. > >> This is simply done by calling scalar_chain::convert_op > >> for copied registers. Bootstrapped and regtested on > >> x86_64-unknown-linux-gnu{-m32}. OK for trunk? > >> > >> Thanks, > >> Ilya > >> -- > >> gcc/ > >> > >> 2016-03-31 Ilya Enkovich <enkovich....@gmail.com> > >> > > > > Missing > > PR target/70442 > > here. > > > >> 2016-03-31 Ilya Enkovich <enkovich....@gmail.com> > >> > > And here too. > > > >> * gcc.target/i386/pr70442.c: New test. > > > >> @@ -3467,6 +3468,8 @@ scalar_chain::convert_insn (rtx_insn *insn) > >> break; > >> > >> case REG: > >> + if (!MEM_P(dst)) > > > > Missing space before (. > > > >> --- /dev/null > >> +++ b/gcc/testsuite/gcc.target/i386/pr70442.c > >> @@ -0,0 +1,18 @@ > > > > I'd add > > /* PR target/70442 */ > > here. > > > >> +/* { dg-do compile { target { ia32 } } } */ > >> +/* { dg-options "-O2 -msse2" } */ > > > > There is really nothing ia32 specific on the test, so I'd move it > > to gcc.dg/pr70442.c instead, and just > > /* { dg-do compile } */ > > /* { dg-options "-O2" } */ > > /* { dg-additional-options "-msse2" { target ia32 } } */ > > or so. > > > > For the i386.c change I'll defer to Uros as the maintainer. > > It is OK with the above proposed improvements. > > Thanks, > Uros.
Thanks for review! Here is a committed version. Thanks, Ilya -- gcc/ 2016-03-31 Ilya Enkovich <enkovich....@gmail.com> PR target/70442 * config/i386/i386.c (scalar_chain::convert_op): Fix description. (scalar_chain::convert_insn): Call convert_op for reg moves to handle undefined registers. gcc/testsuite/ 2016-03-31 Ilya Enkovich <enkovich....@gmail.com> PR target/70442 * gcc.dg/pr70442.c: New test. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 1639704..f06baf0 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3384,9 +3384,10 @@ scalar_chain::convert_reg (unsigned regno) BITMAP_FREE (conv); } -/* Convert operand OP in INSN. All register uses - are converted during registers conversion. - Therefore we should just handle memory operands. */ +/* Convert operand OP in INSN. We should handle + memory operands and uninitialized registers. + All other register uses are converted during + registers conversion. */ void scalar_chain::convert_op (rtx *op, rtx_insn *insn) @@ -3467,6 +3468,8 @@ scalar_chain::convert_insn (rtx_insn *insn) break; case REG: + if (!MEM_P (dst)) + convert_op (&src, insn); break; case SUBREG: diff --git a/gcc/testsuite/gcc.dg/pr70442.c b/gcc/testsuite/gcc.dg/pr70442.c new file mode 100644 index 0000000..b9c11ea --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr70442.c @@ -0,0 +1,20 @@ +/* PR target/70442 */ +/* { dg-do compile } */ +/* { dg-options "-O2" } */ +/* { dg-additional-options "-msse2" { target ia32 } } */ + +char a, c; +void +fn1 () +{ + long long b; + long m; + int d; + switch (d) + { + case 5: + b = a; + } + b ^= m; + c = b >> b; +}