On 04 May 21:41, Jakub Jelinek wrote:
> Hi!
>
> Another 3 define_insns that can handle xmm16+ operands.
>
> Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?
OK for trunk.
--
Thanks, K
>
> 2016-05-04 Jakub Jelinek <ja...@redhat.com>
>
> * config/i386/sse.md (vec_interleave_lowv4sf,
> *vec_interleave_highv2df, *vec_interleave_lowv2df): Use
> v instead of x in vex or maybe_vex alternatives, use
> maybe_evex instead of vex in prefix.
>
> --- gcc/config/i386/sse.md.jj 2016-05-04 14:36:08.000000000 +0200
> +++ gcc/config/i386/sse.md 2016-05-04 15:16:44.180894303 +0200
> @@ -5987,11 +5987,11 @@ (define_expand "vec_interleave_lowv8sf"
> })
>
> (define_insn "vec_interleave_lowv4sf"
> - [(set (match_operand:V4SF 0 "register_operand" "=x,x")
> + [(set (match_operand:V4SF 0 "register_operand" "=x,v")
> (vec_select:V4SF
> (vec_concat:V8SF
> - (match_operand:V4SF 1 "register_operand" "0,x")
> - (match_operand:V4SF 2 "vector_operand" "xBm,xm"))
> + (match_operand:V4SF 1 "register_operand" "0,v")
> + (match_operand:V4SF 2 "vector_operand" "xBm,vm"))
> (parallel [(const_int 0) (const_int 4)
> (const_int 1) (const_int 5)])))]
> "TARGET_SSE"
> @@ -6000,7 +6000,7 @@ (define_insn "vec_interleave_lowv4sf"
> vunpcklps\t{%2, %1, %0|%0, %1, %2}"
> [(set_attr "isa" "noavx,avx")
> (set_attr "type" "sselog")
> - (set_attr "prefix" "orig,vex")
> + (set_attr "prefix" "orig,maybe_evex")
> (set_attr "mode" "V4SF")])
>
> ;; These are modeled with the same vec_concat as the others so that we
> @@ -7480,11 +7494,11 @@ (define_expand "vec_interleave_highv2df"
> })
>
> (define_insn "*vec_interleave_highv2df"
> - [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,x,x,x,m")
> + [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,v,v,x,v,m")
> (vec_select:V2DF
> (vec_concat:V4DF
> - (match_operand:V2DF 1 "nonimmediate_operand" " 0,x,o,o,o,x")
> - (match_operand:V2DF 2 "nonimmediate_operand" " x,x,1,0,x,0"))
> + (match_operand:V2DF 1 "nonimmediate_operand" " 0,v,o,o,o,v")
> + (match_operand:V2DF 2 "nonimmediate_operand" " x,v,1,0,v,0"))
> (parallel [(const_int 1)
> (const_int 3)])))]
> "TARGET_SSE2 && ix86_vec_interleave_v2df_operator_ok (operands, 1)"
> @@ -7498,7 +7512,7 @@ (define_insn "*vec_interleave_highv2df"
> [(set_attr "isa" "noavx,avx,sse3,noavx,avx,*")
> (set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")
> (set_attr "prefix_data16" "*,*,*,1,*,1")
> - (set_attr "prefix" "orig,vex,maybe_vex,orig,vex,maybe_vex")
> + (set_attr "prefix" "orig,maybe_evex,maybe_vex,orig,maybe_evex,maybe_vex")
> (set_attr "mode" "V2DF,V2DF,DF,V1DF,V1DF,V1DF")])
>
> (define_expand "avx512f_movddup512<mask_name>"
> @@ -7639,11 +7653,11 @@ (define_expand "vec_interleave_lowv2df"
> })
>
> (define_insn "*vec_interleave_lowv2df"
> - [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,x,x,x,x,o")
> + [(set (match_operand:V2DF 0 "nonimmediate_operand" "=x,v,v,x,v,o")
> (vec_select:V2DF
> (vec_concat:V4DF
> - (match_operand:V2DF 1 "nonimmediate_operand" " 0,x,m,0,x,0")
> - (match_operand:V2DF 2 "nonimmediate_operand" " x,x,1,m,m,x"))
> + (match_operand:V2DF 1 "nonimmediate_operand" " 0,v,m,0,v,0")
> + (match_operand:V2DF 2 "nonimmediate_operand" " x,v,1,m,m,v"))
> (parallel [(const_int 0)
> (const_int 2)])))]
> "TARGET_SSE2 && ix86_vec_interleave_v2df_operator_ok (operands, 0)"
> @@ -7657,7 +7671,7 @@ (define_insn "*vec_interleave_lowv2df"
> [(set_attr "isa" "noavx,avx,sse3,noavx,avx,*")
> (set_attr "type" "sselog,sselog,sselog,ssemov,ssemov,ssemov")
> (set_attr "prefix_data16" "*,*,*,1,*,1")
> - (set_attr "prefix" "orig,vex,maybe_vex,orig,vex,maybe_vex")
> + (set_attr "prefix" "orig,maybe_evex,maybe_vex,orig,maybe_evex,maybe_vex")
> (set_attr "mode" "V2DF,V2DF,DF,V1DF,V1DF,V1DF")])
>
> (define_split
>
> Jakub
