On 13 May 2016 at 16:37, James Greenhalgh <james.greenha...@arm.com> wrote:
> On Wed, May 11, 2016 at 03:23:56PM +0200, Christophe Lyon wrote:
>> 2016-05-02 Christophe Lyon <christophe.l...@linaro.org>
>>
>> * gcc.target/aarch64/advsimd-intrinsics/vtst.c: Add tests
>> for vtst_p8 and vtstq_p8.
>
> And vtst_p16 and vtstq_p16 too please.
>
> vtst_s64
> vtstq_s64
> vtst_u64
> vtstq_u64 are also missing (AArch64 only).
>
vtst_p16/vtstq_p16 are AArch64 only too, right?
My introduction message was not clear enough: this series
only attempts to fully cover AArch32 intrinsics.
There are many more missing for AArch64.
> Thanks,
> James
>
>>
>> Change-Id: Id555a9b3214945506a106e2465b42d38bf76a3a7
>>
>> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtst.c
>> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtst.c
>> index 9e74ffb..4c7ee79 100644
>> --- a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtst.c
>> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vtst.c
>> @@ -32,6 +32,14 @@ VECT_VAR_DECL(expected_unsigned,uint,16,8) [] = { 0x0,
>> 0xffff,
>> VECT_VAR_DECL(expected_unsigned,uint,32,4) [] = { 0x0, 0xffffffff,
>> 0x0, 0xffffffff };
>>
>> +/* Expected results with poly input. */
>> +VECT_VAR_DECL(expected_poly,uint,8,8) [] = { 0x0, 0xff, 0xff, 0xff,
>> + 0xff, 0xff, 0xff, 0xff };
>> +VECT_VAR_DECL(expected_poly,uint,8,16) [] = { 0x0, 0xff, 0xff, 0xff,
>> + 0xff, 0xff, 0xff, 0xff,
>> + 0xff, 0xff, 0xff, 0xff,
>> + 0xff, 0xff, 0xff, 0xff };
>> +
>> #define INSN_NAME vtst
>> #define TEST_MSG "VTST/VTSTQ"
>>
>> @@ -71,12 +79,14 @@ FNNAME (INSN_NAME)
>> VDUP(vector2, , uint, u, 8, 8, 15);
>> VDUP(vector2, , uint, u, 16, 4, 5);
>> VDUP(vector2, , uint, u, 32, 2, 1);
>> + VDUP(vector2, , poly, p, 8, 8, 15);
>> VDUP(vector2, q, int, s, 8, 16, 15);
>> VDUP(vector2, q, int, s, 16, 8, 5);
>> VDUP(vector2, q, int, s, 32, 4, 1);
>> VDUP(vector2, q, uint, u, 8, 16, 15);
>> VDUP(vector2, q, uint, u, 16, 8, 5);
>> VDUP(vector2, q, uint, u, 32, 4, 1);
>> + VDUP(vector2, q, poly, p, 8, 16, 15);
>>
>> #define TEST_MACRO_NO64BIT_VARIANT_1_5(MACRO, VAR, T1, T2) \
>> MACRO(VAR, , T1, T2, 8, 8); \
>> @@ -109,6 +119,14 @@ FNNAME (INSN_NAME)
>> CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_unsigned, CMT);
>> CHECK(TEST_MSG, uint, 16, 8, PRIx16, expected_unsigned, CMT);
>> CHECK(TEST_MSG, uint, 32, 4, PRIx32, expected_unsigned, CMT);
>> +
>> + /* Now, test the variants with poly8 as input. */
>> +#undef CMT
>> +#define CMT " (poly input)"
>> + TEST_BINARY_OP(INSN_NAME, , poly, p, 8, 8);
>> + TEST_BINARY_OP(INSN_NAME, q, poly, p, 8, 16);
>> + CHECK(TEST_MSG, uint, 8, 8, PRIx8, expected_poly, CMT);
>> + CHECK(TEST_MSG, uint, 8, 16, PRIx8, expected_poly, CMT);
>> }
>>
>> int main (void)
>> --
>> 1.9.1
>>
>
