[PATCH] Improve vcvtps2ph

[Jakub Jelinek]

Hi!

These insns are available in AVX512VL, so we can just use v instead of x.

Bootstrapped/regtested on x86_64-linux and i686-linux, ok for trunk?

2016-05-23  Jakub Jelinek  <ja...@redhat.com>

        * config/i386/sse.md (*vcvtps2ph_store<mask_name>): Use v constraint
        instead of x constraint.
        (vcvtps2ph256<mask_name>): Likewise.

        * gcc.target/i386/avx512vl-vcvtps2ph-3.c: New test.

--- gcc/config/i386/sse.md.jj   2016-05-23 15:07:41.000000000 +0200
+++ gcc/config/i386/sse.md      2016-05-23 15:42:49.854873998 +0200
@@ -18299,7 +18299,7 @@ (define_insn "*vcvtps2ph<mask_name>"
 
 (define_insn "*vcvtps2ph_store<mask_name>"
   [(set (match_operand:V4HI 0 "memory_operand" "=m")
-       (unspec:V4HI [(match_operand:V4SF 1 "register_operand" "x")
+       (unspec:V4HI [(match_operand:V4SF 1 "register_operand" "v")
                      (match_operand:SI 2 "const_0_to_255_operand" "N")]
                     UNSPEC_VCVTPS2PH))]
   "TARGET_F16C || TARGET_AVX512VL"
@@ -18309,8 +18309,8 @@ (define_insn "*vcvtps2ph_store<mask_name
    (set_attr "mode" "V4SF")])
 
 (define_insn "vcvtps2ph256<mask_name>"
-  [(set (match_operand:V8HI 0 "nonimmediate_operand" "=xm")
-       (unspec:V8HI [(match_operand:V8SF 1 "register_operand" "x")
+  [(set (match_operand:V8HI 0 "nonimmediate_operand" "=vm")
+       (unspec:V8HI [(match_operand:V8SF 1 "register_operand" "v")
                      (match_operand:SI 2 "const_0_to_255_operand" "N")]
                     UNSPEC_VCVTPS2PH))]
   "TARGET_F16C || TARGET_AVX512VL"
--- gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c.jj     2016-05-23 
15:51:51.913742438 +0200
+++ gcc/testsuite/gcc.target/i386/avx512vl-vcvtps2ph-3.c        2016-05-23 
15:54:03.316021252 +0200
@@ -0,0 +1,41 @@
+/* { dg-do compile { target { ! ia32 } } } */
+/* { dg-options "-O2 -mf16c -mavx512vl -masm=att" } */
+
+#include <x86intrin.h>
+
+void
+f1 (__m128 x)
+{
+  register __m128 a __asm ("xmm16");
+  register __m128i b __asm ("xmm17");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  b = _mm_cvtps_ph (a, 1);
+  asm volatile ("" : "+v" (b));
+}
+
+/* { dg-final { scan-assembler 
"vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%xmm16\[^\n\r]*%xmm17" } } */
+
+void
+f2 (__m256 x)
+{
+  register __m256 a __asm ("xmm16");
+  register __m128i b __asm ("xmm17");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  b = _mm256_cvtps_ph (a, 1);
+  asm volatile ("" : "+v" (b));
+}
+
+/* { dg-final { scan-assembler 
"vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%ymm16\[^\n\r]*%xmm17" } } */
+
+void
+f3 (__m256 x, __v8hi *y)
+{
+  register __m256 a __asm ("xmm16");
+  a = x;
+  asm volatile ("" : "+v" (a));
+  *y = (__v8hi) _mm256_cvtps_ph (a, 1);
+}
+
+/* { dg-final { scan-assembler 
"vcvtps2ph\[^\n\r]*\\\$1\[^\n\r]*%ymm16\[^\n\r]*%rdi" } } */

        Jakub