On Tuesday 24 May 2016 18:00:27 Kyrill Tkachov wrote:
> Hi Thomas,

Hi Kyrill,


> > 
> > +/* Nonzero if chip supports Thumb.  */
> > +extern int arm_arch_thumb;
> > +
> 
> Bit of bikeshedding really, but I think a better name would be
> arm_arch_thumb1.
> This is because we also have the macros TARGET_THUMB and TARGET_THUMB2
> where TARGET_THUMB2 means either Thumb-1 or Thumb-2 and a casual reader
> might think that arm_arch_thumb means that there is support for either.

Fixed.

> 
> Also, please add a simple test that compiles something with -march=armv5
> (plus -marm) and checks that __ARM_ARCH_ISA_THUMB is not defined.

Fixed too.

Please find the updated in attachment. ChangeLog entries are now:

*** gcc/ChangeLog ***

2016-05-26  Thomas Preud'homme  <thomas.preudho...@arm.com>

        * config/arm/arm-protos.h (arm_arch_thumb1): Declare.
        * config/arm/arm.c (arm_arch_thumb1): Define.
        (arm_option_override): Initialize arm_arch_thumb1.
        * config/arm/arm.h (arm_arch_thumb1): Declare.
        (TARGET_ARM_ARCH_ISA_THUMB): Use arm_arch_thumb to determine if target
        support Thumb-1 ISA.


*** gcc/testsuite/ChangeLog ***

2016-05-26  Thomas Preud'homme  <thomas.preudho...@arm.com>

        * gcc.target/arm/armv5_thumb_isa.c: New test.


Given the renaming I've redone the testing and confirmed that the patch still 
works as intended.

Best regards,

Thomas
diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h
index d8179c441bb53dced94d2ebf497aad093e4ac600..34fd06a92d99cfcb7ece4da7f1a2957e0225e4fb 100644
--- a/gcc/config/arm/arm-protos.h
+++ b/gcc/config/arm/arm-protos.h
@@ -603,6 +603,9 @@ extern int arm_tune_cortex_a9;
    interworking clean.  */
 extern int arm_cpp_interwork;
 
+/* Nonzero if chip supports Thumb 1.  */
+extern int arm_arch_thumb1;
+
 /* Nonzero if chip supports Thumb 2.  */
 extern int arm_arch_thumb2;
 
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index ad123dde991a3e4c4b9563ee6ebb84981767988f..1df676e7f844513c0b1b80be492965462557e25b 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -478,6 +478,9 @@ extern int arm_tune_cortex_a9;
    interworking clean.  */
 extern int arm_cpp_interwork;
 
+/* Nonzero if chip supports Thumb 1.  */
+extern int arm_arch_thumb1;
+
 /* Nonzero if chip supports Thumb 2.  */
 extern int arm_arch_thumb2;
 
@@ -2191,9 +2194,8 @@ extern int making_const_table;
 #define TARGET_ARM_V7M (!arm_arch_notm && arm_arch_thumb2)
 
 /* The highest Thumb instruction set version supported by the chip.  */
-#define TARGET_ARM_ARCH_ISA_THUMB 		\
-  (arm_arch_thumb2 ? 2				\
-	           : ((TARGET_ARM_ARCH >= 5 || arm_arch4t) ? 1 : 0))
+#define TARGET_ARM_ARCH_ISA_THUMB		\
+  (arm_arch_thumb2 ? 2 : (arm_arch_thumb1 ? 1 : 0))
 
 /* Expands to an upper-case char of the target's architectural
    profile.  */
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index 71b51439dc7ba5be67671e9fb4c3f18040cce58f..2ceee9071cb6c079c203e5876ea7e4749a255169 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -852,6 +852,9 @@ int arm_tune_cortex_a9 = 0;
    interworking clean.  */
 int arm_cpp_interwork = 0;
 
+/* Nonzero if chip supports Thumb 1.  */
+int arm_arch_thumb1;
+
 /* Nonzero if chip supports Thumb 2.  */
 int arm_arch_thumb2;
 
@@ -3170,6 +3173,7 @@ arm_option_override (void)
   arm_arch7em = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH7EM);
   arm_arch8 = ARM_FSET_HAS_CPU1 (insn_flags, FL_ARCH8);
   arm_arch8_1 = ARM_FSET_HAS_CPU2 (insn_flags, FL2_ARCH8_1);
+  arm_arch_thumb1 = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB);
   arm_arch_thumb2 = ARM_FSET_HAS_CPU1 (insn_flags, FL_THUMB2);
   arm_arch_xscale = ARM_FSET_HAS_CPU1 (insn_flags, FL_XSCALE);
 
diff --git a/gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c b/gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c
new file mode 100644
index 0000000000000000000000000000000000000000..80a00aec978778e848ea47d1eb00974fe7b0d3f5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/armv5_thumb_isa.c
@@ -0,0 +1,8 @@
+/* { dg-require-effective-target arm_arch_v5_ok } */
+/* { dg-add-options arm_arch_v5 } */
+
+#if __ARM_ARCH_ISA_THUMB
+#error "__ARM_ARCH_ISA_THUMB defined for ARMv5"
+#endif
+
+int foo;

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