On 01/06/16 11:18, Kyrill Tkachov wrote: > Hi Ramana, > > On 01/06/16 10:07, Ramana Radhakrishnan wrote: >> >> On 01/06/16 10:02, Ramana Radhakrishnan wrote: >>> >>> On 09/03/16 12:56, Kyrill Tkachov wrote: >>>> Hi all, >>>> >>>> I notice that the output code for our store exclusive patterns accesses >>>> unallocated memory. >>>> It wants to output an strexd instruction with a pair of consecutive >>>> registers corresponding >>>> to a DImode value. For that it creates the SImode top half of the DImode >>>> register and puts it >>>> into operands[3]. But the pattern only defines entries only up to >>>> operands[2], with no match_dup 3 >>>> or like that, so operands[3] should technically be out of bounds. >>>> >>>> We already have a mechanism for printing the top half of a DImode >>>> register, that's the 'H' output modifier. >>>> So this patch changes those patterns to use that, eliminating the out of >>>> bounds access and making >>>> the code a bit simpler as well. >>>> >>>> Bootstrapped and tested on arm-none-linux-gnueabihf. >>>> >>>> Ok for trunk? >>>> >>>> Thanks, >>>> Kyrill >>>> >>>> 2016-03-09 Kyrylo Tkachov <kyrylo.tkac...@arm.com> >>>> >>>> * config/arm/sync.md (arm_store_exclusive<mode>): >>>> Use 'H' output modifier on operands[2] rather than creating a new >>>> entry in out-of-bounds memory of the operands array. >>>> (arm_store_release_exclusivedi): Likewise. >>> >>> Ok, >>> >> Ah hang on - is this safe for big-endian - remind me again why we shouldn't >> use 'Q' and 'R' here ? > > Thanks for looking at this. > The existing code does an STRD of REG and REG+1 without any concern for > endianness. > This patch simplifies that logic (since %H is just REG+1), so there's no > change in behaviour.
Yep makes sense - thanks, not enough coffee this morning. The patch is ok. Ramana