On 8 June 2016 at 09:37, Christophe Lyon <christophe.l...@linaro.org> wrote:
> On 7 June 2016 at 19:05, Wilco Dijkstra <wilco.dijks...@arm.com> wrote:
>> Hi,
>>
>>
>> These new tests cause failures due to running on non-ARMv8 hardware - the
>> target check should be arm_v8_neon_hw. Also they don't run on AArch64
>> hardware as arm_v8_neon_ok/arm_v8_neon_hw isn't true.
>
> This really makes sense.
>
> I use QEMU to run the tests, and according to my logs, the tests are compiled
> with -mfpu=neon-fp-armv8 -march=armv8-a
> and QEMU --cpu cortex-a9 (on the validation configurations intended to
> validate armv7-a).
>
> So... it looks like QEMU failed to reject the invalid instructions?
> I'm using QEMU-2.4.1.
>
Looking in more details, objdump says:
1074c: f3fa05a0 vrintz.f32 d16, d16
and qemu -d in_asm says:
0x0001074c: f3fa05a0 vabal.u<illegal width 64> q8, d26, d16
and I've just had the same behaviour with QEMU-2.6.0
incorrect decoding probably means incorrect execution
(but how does the test manage to pass?).
Christophe
>> check_effective_target_arm_v8_neon_hw in testsuite/lib/target-supports.exp
>> needs to be extended to allow running on AArch64 as well, as these tests
>> pass when I remove the dg-require-effective-target line.
>
> Probably, I didn't take AArch64 into account when added these.
> AArch64 intrinsics tests completion is still to be done.
>
> Christophe
>
>>
>> Wilco
>>
>>
>> diff --git a/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c
>> b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c
>> new file mode 100644
>> index 0000000..5f492d4
>> --- /dev/null
>> +++ b/gcc/testsuite/gcc.target/aarch64/advsimd-intrinsics/vrnd.c
>> @@ -0,0 +1,16 @@
>> +/* { dg-require-effective-target arm_v8_neon_ok } */
>>
>> This should be arm_v8_neon_hw (the arm_v8_neon_ok can only be used for
>> compilation).
>>
>> +/* { dg-add-options arm_v8_neon } */
>>
>> ________________________________
