No functional changes. 2016-06-13 Uros Bizjak <ubiz...@gmail.com>
* config/i386/i386.md (paritydi2): Use ix86_expand_setcc. (paritysi2): Ditto. (isinfxf2): Ditto. (isinf<mode>2): Ditto. Bootstrapped and regression tested on x86_64-linux-gnu {,-m32}. Committed to mainline SVN. Uros.
Index: config/i386/i386.md =================================================================== --- config/i386/i386.md (revision 237381) +++ config/i386/i386.md (working copy) @@ -13458,15 +13458,12 @@ "! TARGET_POPCNT" { rtx scratch = gen_reg_rtx (QImode); - rtx cond; emit_insn (gen_paritydi2_cmp (NULL_RTX, NULL_RTX, NULL_RTX, operands[1])); - cond = gen_rtx_fmt_ee (ORDERED, QImode, - gen_rtx_REG (CCmode, FLAGS_REG), - const0_rtx); - emit_insn (gen_rtx_SET (scratch, cond)); + ix86_expand_setcc (scratch, ORDERED, + gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx); if (TARGET_64BIT) emit_insn (gen_zero_extendqidi2 (operands[0], scratch)); @@ -13486,14 +13483,11 @@ "! TARGET_POPCNT" { rtx scratch = gen_reg_rtx (QImode); - rtx cond; emit_insn (gen_paritysi2_cmp (NULL_RTX, NULL_RTX, operands[1])); - cond = gen_rtx_fmt_ee (ORDERED, QImode, - gen_rtx_REG (CCmode, FLAGS_REG), - const0_rtx); - emit_insn (gen_rtx_SET (scratch, cond)); + ix86_expand_setcc (scratch, ORDERED, + gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx); emit_insn (gen_zero_extendqisi2 (operands[0], scratch)); DONE; @@ -16159,8 +16153,6 @@ rtx mask = GEN_INT (0x45); rtx val = GEN_INT (0x05); - rtx cond; - rtx scratch = gen_reg_rtx (HImode); rtx res = gen_reg_rtx (QImode); @@ -16168,10 +16160,8 @@ emit_insn (gen_andqi_ext_0 (scratch, scratch, mask)); emit_insn (gen_cmpqi_ext_3 (scratch, val)); - cond = gen_rtx_fmt_ee (EQ, QImode, - gen_rtx_REG (CCmode, FLAGS_REG), - const0_rtx); - emit_insn (gen_rtx_SET (res, cond)); + ix86_expand_setcc (res, EQ, + gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx); emit_insn (gen_zero_extendqisi2 (operands[0], res)); DONE; }) @@ -16186,8 +16176,6 @@ rtx mask = GEN_INT (0x45); rtx val = GEN_INT (0x05); - rtx cond; - rtx scratch = gen_reg_rtx (HImode); rtx res = gen_reg_rtx (QImode); @@ -16204,10 +16192,8 @@ emit_insn (gen_andqi_ext_0 (scratch, scratch, mask)); emit_insn (gen_cmpqi_ext_3 (scratch, val)); - cond = gen_rtx_fmt_ee (EQ, QImode, - gen_rtx_REG (CCmode, FLAGS_REG), - const0_rtx); - emit_insn (gen_rtx_SET (res, cond)); + ix86_expand_setcc (res, EQ, + gen_rtx_REG (CCmode, FLAGS_REG), const0_rtx); emit_insn (gen_zero_extendqisi2 (operands[0], res)); DONE; })