Similar to PR70098, which is about integers in floating point registers, we can have the completely analogous problem with vector registers as well now that we allow integers in vector registers. So, this patch solves it in the same way. This only works for targets with direct move.
To recap: register allocation can decide to put an integer mode value in a floating point or vector register. If that register is used in a bd*z instruction, which is a jump instruction, reload can not do an output reload on it (it does not do output reloads on any jump insns), so the float or vector register will remain, and we have to allow it here or recog will ICE. Later on we will split this to valid instructions, including a move from that fp/vec register to an int register; it is this move that will still fail (PR70098) if we do not have direct move enabled. Bootstrapped and tested on powerpc64-linux (-m32/-m64, -mlra/-mno-lra); testing on powerpc64le-linux in progress. Also tested the new testcase separately. And bootstrapped/tested on powerp64le-linux. This will need to go to the 6 branch together with the int-in-vector patches (and the previous 70098 patch if that isn't there yet). Committing to trunk. Segher 2016-07-06 Segher Boessenkool <seg...@kernel.crashing.org> PR target/70098 PR target/71763 * config/rs6000/rs6000.md (*ctr<mode>_internal1, *ctr<mode>_internal2, *ctr<mode>_internal5, *ctr<mode>_internal6): gcc/testsuite/ PR target/70098 PR target/71763 * gcc.target/powerpc/pr71763.c: New file. --- gcc/config/rs6000/rs6000.md | 8 ++++---- gcc/testsuite/gcc.target/powerpc/pr71763.c | 27 +++++++++++++++++++++++++++ 2 files changed, 31 insertions(+), 4 deletions(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr71763.c diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index a7615b1..fcb70e5 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -12151,7 +12151,7 @@ (define_insn "*ctr<mode>_internal1" (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) @@ -12175,7 +12175,7 @@ (define_insn "*ctr<mode>_internal2" (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) @@ -12201,7 +12201,7 @@ (define_insn "*ctr<mode>_internal5" (const_int 1)) (label_ref (match_operand 0 "" "")) (pc))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) @@ -12225,7 +12225,7 @@ (define_insn "*ctr<mode>_internal6" (const_int 1)) (pc) (label_ref (match_operand 0 "" "")))) - (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*c*l") + (set (match_operand:P 2 "nonimmediate_operand" "=1,*r,m,*d*wi*c*l") (plus:P (match_dup 1) (const_int -1))) (clobber (match_scratch:CC 3 "=X,&x,&x,&x")) diff --git a/gcc/testsuite/gcc.target/powerpc/pr71763.c b/gcc/testsuite/gcc.target/powerpc/pr71763.c new file mode 100644 index 0000000..7910a90 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr71763.c @@ -0,0 +1,27 @@ +// PR target/71763 +// { dg-do compile } +// { dg-options "-O1 -mvsx" } +// { dg-xfail-if "PR70098" { lp64 && powerpc64_no_dm } } +// { dg-prune-output ".*internal compiler error.*" } + +int a, b; +float c; + +void fn2(void); + +void fn1(void) +{ + long d; + + for (d = 3; d; d--) { + for (a = 0; a <= 1; a++) { + b &= 1; + if (b) { + for (;;) { + fn2(); + c = d; + } + } + } + } +} -- 1.9.3