* Claudiu Zissulescu <claudiu.zissule...@synopsys.com> [2016-06-30 12:36:10 +0200]:
> Small patches batch. > > Ok to apply? > Claudiu > > gcc/ > 2016-05-09 Claudiu Zissulescu <claz...@synopsys.com> > > * config/arc/arc.c (arc_process_double_reg_moves): Change. > * config/arc/arc.md (movsi_insn): Disable unsupported move > instructions for ARCv2 cores. > (movdi): Use prepare_move_operands. > (movsf, movdf): Use move_dest_operand predicate. > (arc_process_double_reg_moves): Change. > * config/arc/constraints.md (Chs): Enable when barrel shifter is > present. > * config/arc/fpu.md (divsf3): Change. > * config/arc/fpx.md (dexcl_3op_peep2_insn): Dx data register is > also a destination. > (dexcl_3op_peep2_insn_nores): Likewise. > * config/arc/arc.h (SHIFT_COUNT_TRUNCATED): Define to one. > (LINK_COMMAND_SPEC): Remove. > --- > gcc/config/arc/arc.c | 5 +---- > gcc/config/arc/arc.h | 27 +++------------------------ > gcc/config/arc/arc.md | 35 +++++++++++++++++++---------------- > gcc/config/arc/constraints.md | 3 ++- > gcc/config/arc/fpu.md | 4 +++- > gcc/config/arc/fpx.md | 26 ++++++++++++-------------- > 6 files changed, 40 insertions(+), 60 deletions(-) > <snip> > diff --git a/gcc/config/arc/fpu.md b/gcc/config/arc/fpu.md > index 9b0a65d..1050cab 100644 > --- a/gcc/config/arc/fpu.md > +++ b/gcc/config/arc/fpu.md > @@ -197,7 +197,9 @@ > [(set (match_operand:SF 0 "register_operand" "=r,r,r,r,r") > (div:SF (match_operand:SF 1 "nonmemory_operand" "0,r,0,r,F") > (match_operand:SF 2 "nonmemory_operand" "r,r,F,F,r")))] > - "TARGET_FP_SP_SQRT" > + "TARGET_FP_SP_SQRT > + && (register_operand (operands[1], SFmode) > + || register_operand (operands[2], SFmode))" > "fsdiv%? %0,%1,%2" > [(set_attr "length" "4,4,8,8,8") > (set_attr "iscompact" "false") Maybe I'm doing something wrong, but with this chunk applied I can no longer build ARC gcc. The internals manual says: "For a named pattern, the condition may not depend on the data in the insn being matched, but only the target-machine-type flags. The compiler needs to test these conditions during initialization in order to learn exactly which named instructions are available in a particular run." And, with this patch applied, I get a build error: In file included from ./tm.h:43:0, from /path/to/gcc/gcc/backend.h:28, from insn-opinit.c:7: insn-opinit.c: In function ‘void init_all_optabs(target_optabs*)’: ./insn-flags.h:160:26: error: ‘operands’ was not declared in this scope && (register_operand (operands[1], SFmode) \ ^ insn-opinit.c:220:13: note: in expansion of macro ‘HAVE_divsf3’ ena[46] = HAVE_divsf3; Is it me doing something wrong, or is there possibly part of this patch missing? Thanks, Andrew