On 11/09/2016 03:40 AM, Andreas Schwab wrote:
As seen by the testcase in PR77822, combine can generate out-of-range
bit pos in a bit-field insn, unless the pattern explicitly rejects it.
This only makes a difference for expressions that are undefined at
runtime. Without that we would either generate bad assembler or ICE in
output_btst.
PR target/78254
* config/m68k/m68k.md: Reject out-of-range bit pos in bit-fields
insns operating on a register.
Could you please include a testcase for this? Even if it's something
that triggered during a bootstrap -- few people bootstrap m68k these
days :-)
jeff
