And CC'ing Ramana and Richard this time...
On 11/11/16 16:18, Kyrill Tkachov wrote:
On 11/11/16 16:15, Andre Vieira (lists) wrote:
Why are you writing 1.0 to clear the register? I think you want
CONST0_RTX (DFmode)
and CONST0_RTX (SFmode).
Also, in this function when you iterate from regno = 0 up to some
number, please use
regno = R0_REGNUM (minor nit).
Thanks,
Kyrill
Hi Kyrill,
So you got me thinking there. I couldn't quite remember why I had chosen
1.0 rather than 0 to clear the FP registers. I now know it is because
vmov (immediate) will not take 0.0, it does take 1.0.
Ah, you're right (I checked it too).
I made the other
changes you suggested and changed the vmovs in the library function
wrapper back to #1.0. I also removed the second register for the single
precision FP clearing, since the vmov from two general registers to two
single precision registers can take the same general register twice,
saving on a mov. There is a discrepancy there with the way I clear other
FP registers, there I do use 0, since I'd need two moves(or a move and a
shift) to encode 1.0 into a general purpose register, so I made a
conscious choice of performance over consistency there.
Hmm, I'll defer to Ramana or Richard on whether we should keep consistent
between SP and DP
in libgcc/config/arm/cmse_nonsecure_call.S.
Otherwise the patch looks good to me.
Until this patch is approved by an arm maintainer can you please do a bootstrap
and regtest
on an arm-none-linux-gnueabihf target of all the patches in the series.
Thanks,
Kyrill
Again no changes to ChangeLog.
Cheers,
Andre
