> >> Thanks for catching this. I think I got endian confusion inside my head >> while I was writing the above. I will rewrite these comments, below also. > > Note the ISA calls the bits in 32-bit registers 32..63, so that 63 is > the rightmost bit in all registers. >
True, but the ISA only uses the lower half of the 64-bit register, so I have describe my patterns using SI mode instead of DI mode, which is part of the reason I was numbering my bits differently than the ISA document. The reason I am using SI mode is so that I don't have to disqualify the use of these functions on a 32-bit big-endian configuration. Do you want me to switch to DI mode for all the operands? >>> I wonder if we really need all these predicate expanders, if it wouldn't >>> be easier if the builtin handling code did the setb itself? >>> >> >> The reason it seems most "natural" to me use the expanders is because I >> need to introduce a temporary CR scratch register between expansion and >> insn matching. Also, it seems that the *setb pattern may be of more >> general use in the future implementation of other built-in functions. >> I'm inclined to keep this as is, but if you still feel otherwise, I'll >> figure out how to avoid the expansion. > > The code (in rs6000.c) expanding the builtin can create two insns directly, > so that you do not need to repeat this over and over in define_expands? > The pattern I'm familiar with is to allocate the temporary scratch register during expansion, and to use the allocated temporary at insn match time. I'll have to teach myself a new pattern to do all of this at insn match time. Feel free to point me to an example of define_insn code that does this. Thanks again. -- Kelvin Nilsen, Ph.D. kdnil...@linux.vnet.ibm.com home office: 801-756-4821, cell: 520-991-6727 IBM Linux Technology Center - PPC Toolchain
