On Tue, Nov 29, 2016 at 02:14:17PM -0500, Michael Meissner wrote:
> I was developing the next round of ISA 3.0 code changes to use the vector
> extract byte, half word, and word instructions (VEXTU{B,H,W}{R,L}X) that
> deposit the value into a general purpose register instead of a vector
> register,
> and I was running the changes through the simulator. I discovered that my
> previous change to allow QImode/HImode did not work if the value was in a
> traditional Altivec register.
>
> This fixes the problem that I noticed. I didn't bother doing the full
> bootstrap and check, since it only affects the power9 target. Can I check
> this
> in?
Certainly, please do. Thanks,
Segher
> 2016-11-29 Michael Meissner <meiss...@linux.vnet.ibm.com>
>
> PR target/78594
> * config/rs6000/rs6000.md (mov<mode>_internal, QHI iterator): Add
> 'x' to stxsi<wd>x print pattern, so that QImode and HImode values
> residing in traditional altivec registers can be stored
> correctly.
