From: Eric Botcazou <ebotca...@adacore.com> Date: Fri, 16 Sep 2011 22:53:09 +0200
>> There have never been TFmode float operations implemented in hardware >> ever for sparc, and I doubt we'll see it in the future. >> >> And this applies also to the FMA instructions. > > Do the specs totally disregard quad floats for FMA or...? The documentation I've read merely states that presence of single and double precision versions of these instructions, and their behavior. The same is also the case for all of the HPC instructions (such as "fhadd" which is "floating point add and halve"). Only single and double precision versions are provided and described. Absolutely no consideration nor mention is made to quad precision at all. These are instruction set extensions, rather than an addition or modification to v9. So I wouldn't go so far as to say that they have some requirement to take quad floating point into consideration, or even mention it at all.
