Bootstrapped and regression tested powerpc64-linux biarch. elf_high has said "Elf specific ways of loading addresses for non-PIC code" ^^^^^^^ right from the inital V4 support in 1995.
OK for mainline? PR target/79066 * config/rs6000/rs6000.md (elf_high, elf_low): Disable when pic. testsuite/ * gcc.target/powerpc/pr79066.c: New. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 80c10a7..98209fa 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -10597,14 +10597,14 @@ (define_insn_and_split "*tocref<mode>" (define_insn "elf_high" [(set (match_operand:SI 0 "gpc_reg_operand" "=b*r") (high:SI (match_operand 1 "" "")))] - "TARGET_ELF && ! TARGET_64BIT" + "TARGET_ELF && !TARGET_64BIT && !flag_pic" "lis %0,%1@ha") (define_insn "elf_low" [(set (match_operand:SI 0 "gpc_reg_operand" "=r") (lo_sum:SI (match_operand:SI 1 "gpc_reg_operand" "b") (match_operand 2 "" "")))] - "TARGET_ELF && ! TARGET_64BIT" + "TARGET_ELF && !TARGET_64BIT && !flag_pic" "la %0,%2@l(%1)") ;; Call and call_value insns diff --git a/gcc/testsuite/gcc.target/powerpc/pr79066.c b/gcc/testsuite/gcc.target/powerpc/pr79066.c new file mode 100644 index 0000000..86b2014 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr79066.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target { fpic && ilp32 } } } */ +/* { dg-options "-O2 -fpic" } */ +/* { dg-final { scan-assembler-not "lis.*@ha" } } */ + +union U { double x; int i[2]; }; + +double +foo (double x) +{ + union U v; + v.i[0] = 0x7ff00000; + v.i[1] = 0; + return x / v.x; +} -- Alan Modra Australia Development Lab, IBM