On Fri, Apr 14, 2017 at 05:43:28PM -0400, Michael Meissner wrote:
> On Fri, Apr 14, 2017 at 03:48:47AM -0500, Segher Boessenkool wrote:
> > On Wed, Apr 12, 2017 at 06:45:31PM -0400, Michael Meissner wrote:
> > > The problem is rs6000_expand_vector_extract did not check for SFmode being
> > > allowed in the Altivec (upper) registers, but the insn implementing the
> > > variable extract had it as a condition.
> > >
> > > In looking at the variable extract code, it currently does not require
> > > SFmode
> > > to go in the Altivec registers, but it does require DImode to go into the
> > > Altivec registers (vec_extract of V2DFmode will require DFmode to go in
> > > Altivec
> > > registers instead of DImode).
> >
> >
> > > @@ -7586,15 +7586,23 @@ rs6000_expand_vector_extract (rtx target
> > > switch (mode)
> > > {
> > > case V2DFmode:
> > > - emit_insn (gen_vsx_extract_v2df_var (target, vec, elt));
> > > - return;
> > > + if (TARGET_UPPER_REGS_DF)
> > > + {
> > > + emit_insn (gen_vsx_extract_v2df_var (target, vec, elt));
> > > + return;
> > > + }
> > > + break;
> >
> > If the option is not set, we then ICE later on as far as I see (since
> > elt is not a CONST_INT). Is that what we want, can that not happen?
> > In that case, please just do an assert (TARGET_UPPER_REGS_DF) here?
>
> No. I guess I was unclear.
I'm asking about this exact code that I quoted. After the change here,
if not TARGET_UPPER_REGS_DF, it breaks out of the switch, and then
immediately ICEs (failing assert on CONST_INT_P). Right? Or do I read
this wrong.
Segher
