On Wed, Apr 26, 2017 at 12:20 PM, Bin.Cheng <amker.ch...@gmail.com> wrote: > This is another one where context diff might help. No code change > from previous version.
This isn't a context diff. Anyways, changes like using 'tmp' really interfere with creating a useful diff so it's hard to review no-op changes from the real meat. I spot re-ordering and doing parts.offset in a different way first. I wonder if we can do better by first re-factoring fields of mem_address to how TARGET_MEM_REF is laid out now -- merge symbol and base and introduce index2 so that create_mem_ref_raw becomes a 1:1 mapping. Anyway, the patch looks fine (after much staring) but it could really need some more commenting on what we try to do in what order and why. Thanks, Richard. > Thanks, > bin > > On Tue, Apr 18, 2017 at 11:49 AM, Bin Cheng <bin.ch...@arm.com> wrote: >> Hi, >> This patch generates TMR for ivopts in new re-association order. General >> idea is, >> by querying target's addressing mode, we put as much address computation as >> possible >> in memory reference. For computation that has to be done outside of memory >> reference, >> we re-associate the address expression in new order so that loop invariant >> expression >> is kept and exposed for later lim pass. >> Is it OK? >> >> Thanks, >> bin >> 2017-04-11 Bin Cheng <bin.ch...@arm.com> >> >> * tree-ssa-address.c: Include header file. >> (move_hint_to_base): Return TRUE if BASE_HINT is moved to memory >> address. >> (add_to_parts): Refactor. >> (addr_to_parts): New parameter. Update use of move_hint_to_base. >> (create_mem_ref): Update use of addr_to_parts. Re-associate addr >> in new order.
