On Fri, Jun 16, 2017 at 05:55:35PM -0400, Michael Meissner wrote: > Here is the latest patch that restricts the optimization to 64-bit (due to > needing VSX small integers). I've done a full bootstrap/make check on a > little > endian power8 system, and a build without bootstrap and make check on a little > endian power9 system. Neither the power8 nor the power9 systems had any > regressions. I'm also running a test on a big endian power7 system for > completeness. > > Assuming the power7 test finishes without any regressions, can I check this > patch into the trunk and later the GCC 7 branch. > > The main change was to restrict the optimization to 64-bit PowerPC that have > VSX small integer support turned on (default for 64-bit). I did shorten the > one line in the testsuite that you mentioned.
Okay for both. Thanks! Segher > 2017-06-16 Michael Meissner <meiss...@linux.vnet.ibm.com> > > PR target/79799 > * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add support > for doing vector set of SFmode on ISA 3.0. > * config/rs6000/vsx.md (vsx_set_v4sf_p9): Likewise. > (vsx_set_v4sf_p9_zero): Special case setting 0.0f to a V4SF > element. > (vsx_insert_extract_v4sf_p9): Add an optimization for inserting a > SFmode value into a V4SF variable that was extracted from another > V4SF variable without converting the element to double precision > and back to single precision vector format. > (vsx_insert_extract_v4sf_p9_2): Likewise. > > [gcc/testsuite] > 2017-06-16 Michael Meissner <meiss...@linux.vnet.ibm.com> > > PR target/79799 > * gcc.target/powerpc/pr79799-1.c: New test. > * gcc.target/powerpc/pr79799-2.c: Likewise. > * gcc.target/powerpc/pr79799-3.c: Likewise. > * gcc.target/powerpc/pr79799-4.c: Likewise. > * gcc.target/powerpc/pr79799-5.c: Likewise.
